AT32UC3B0512-Z2UR Atmel, AT32UC3B0512-Z2UR Datasheet - Page 413

• Manufacturer Part Number: AT32UC3B0512-Z2UR
• Description: IC MCU AVR32 512K FLASH 64QFN
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0512-Z2UR

• Package / Case: 64-QFN
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 44
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Program Memory Size: 512KB (512K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.8.1
22.8.1.1
Name:
Access Type:
Offset:
Reset Value:
•
•
•
•
•
•
•
32059J–12/2010
UIMOD: USBB Mode
UIDE: USB_ID Pin Enable
UNLOCK: Timer Access Unlock
TIMPAGE: Timer Page
TIMVALUE: Timer Value
USBE: USBB Enable
FRZCLK: Freeze USB Clock
USBE
STOE
31
23
15
7
-
-
This bit has no effect when UIDE is one (USB_ID input pin activated).
0: The module is in USB host mode.
1: The module is in USB device mode.
This bit can be written even if USBE is zero or FRZCLK is one. Disabling the USBB (by writing a zero to the USBE bit) does not
0: The USB mode (device/host) is selected from the UIMOD bit.
1: The USB mode (device/host) is selected from the USB_ID input pin.
This bit can be written even if USBE is zero or FRZCLK is one. Disabling the USBB (by writing a zero to the USBE bit) does not
1: The TIMPAGE and TIMVALUE fields are unlocked.
0: The TIMPAGE and TIMVALUE fields are locked.
The TIMPAGE and TIMVALUE fields can always be read, whatever the value of UNLOCK.
This field contains the page value to access a special timer register.
This field selects the timer value that is written to the special time register selected by TIMPAGE. See
Writing a zero to this bit will reset the USBB, disable the USB transceiver and, disable the USBB clock inputs. Unless explicitly
1: The USBB is enabled.
0: The USBB is disabled.
This bit can be written even if FRZCLK is one.
1: The clock input are disabled (the resume detection is still active).This reduces power consumption. Unless explicitly stated, all
reset this bit.
reset this bit.
details.
stated, all registers then will become read-only and will be reset.
USB General Registers
General Control Register
UNLOCK
FRZCLK
30
22
14
6
-
USBCON
Read/Write
0x0800
0x03004000
ROLEEXE
VBUSPO
29
21
13
5
-
TIMPAGE
OTGPADE
BCERRE
28
20
12
4
-
VBERRE
27
19
11
3
-
-
26
18
10
2
-
-
VBUSTE
UIMOD
25
17
9
1
Section 22.7.1.8
TIMVALUE
AT32UC3B
VBUSHWC
UIDE
IDTE
24
16
8
0
for
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