AT32UC3B0512-Z2UR Atmel, AT32UC3B0512-Z2UR Datasheet - Page 328

• Manufacturer Part Number: AT32UC3B0512-Z2UR
• Description: IC MCU AVR32 512K FLASH 64QFN
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0512-Z2UR

• Package / Case: 64-QFN
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 44
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Program Memory Size: 512KB (512K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21.6.4.6
21.6.4.7
21.6.5
32059J–12/2010
IrDA Mode
Disable Successive Receive NACK
Protocol T = 1
When the USART repetition number reaches MAX_ITERATION, the ITERATION bit is set in the
Channel Status Register (CSR). If the repetition of the character is acknowledged by the
receiver, the repetitions are stopped and the iteration counter is cleared.
The ITERATION bit in CSR can be cleared by writing the Control Register with the RSIT bit at 1.
The receiver can limit the number of successive NACKs sent back to the remote transmitter.
This is programmed by setting the bit DSNACK in the Mode Register (MR). The maximum num-
ber of NACK transmitted is programmed in the MAX_ITERATION field. As soon as
MAX_ITERATION is reached, the character is considered as correct, an acknowledge is sent on
the line and the ITERATION bit in the Channel Status Register is set.
When operating in ISO7816 protocol T = 1, the transmission is similar to an asynchronous for-
mat with only one stop bit. The parity is generated when transmitting and checked when
receiving. Parity error detection sets the PARE bit in the Channel Status Register (CSR).
The USART features an IrDA mode supplying half-duplex point-to-point wireless communica-
tion. It embeds the modulator and demodulator which allows a glueless connection to the
infrared transceivers, as shown in
with the IrDA specification version 1.1 and support data transfer speeds ranging from 2.4 Kb/s to
115.2 Kb/s.
The USART IrDA mode is enabled by setting the MODE field in the Mode Register (MR) to the
value 0x8. The IrDA Filter Register (IFR) allows configuring the demodulator filter. The USART
transmitter and receiver operate in a normal asynchronous mode and all parameters are acces-
sible (except those fixed by IrDA specification : one start bit , 8 data bits and one stop bit). Note
that the modulator and the demodulator are activated.
Figure 21-32. Connection to IrDA Transceivers
The receiver and the transmitter must be enabled or disabled according to the direction of the
transmission to be managed.
To receive IrDA signals, the following needs to be done:
• Disable TX and Enable RX
Transmitter
Receiver
USART
Demodulator
Figure
Modulator
21-32. The modulator and demodulator are compliant
RXD
TXD
RX
TX
Transceivers
AT32UC3B
IrDA
328