ATTINY44A-SSN Atmel, ATTINY44A-SSN Datasheet - Page 20

IC MCU AVR 4KB FLASH 20MHZ 14SOI

ATTINY44A-SSN

Manufacturer Part Number
ATTINY44A-SSN
Description
IC MCU AVR 4KB FLASH 20MHZ 14SOI
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY44A-SSN

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.4
5.4.1
5.5
5.5.1
20
I/O Memory
Register Description
ATtiny24A/44A/84A
General Purpose I/O Registers
EEARH – EEPROM Address Register
be used. If a reset occurs while a write operation is in progress, the write operation will be com-
pleted provided that the power supply voltage is sufficient.
The I/O space definition of the ATtiny24A/44A/84A is shown in
266.
All ATtiny24A/44A/84A I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. See the instruction
set section for more details. When using the I/O specific commands IN and OUT, the I/O
addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD
and ST instructions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that CBI and SBI
instructions will only operate on the specified bit, and can therefore be used on registers contain-
ing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
The ATtiny24A/44A/84A contains three General Purpose I/O Registers. These registers can be
used for storing any information, and they are particularly useful for storing global variables and
status flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
• Bits 7:1 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bit 0 – EEAR8: EEPROM Address
This is the most significant EEPROM address bit of ATtiny84A. In devices with less EEPROM,
i.e. ATtiny24A/ATtiny44A, this bit is reserved and will always read zero. The initial value of the
EEPROM Address Register (EEAR) is undefined and a proper value must therefore be written
before the EEPROM is accessed.
Bit
0x1F (0x3F)
Read/Write
Initial Value
R
7
0
R
6
0
5
R
0
R
4
0
R
3
0
R
2
0
“Register Summary” on page
R
1
0
EEAR8
R/W
X/0
0
8183C–AVR–03/11
EEARH

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