PIC16F688-E/P Microchip Technology, PIC16F688-E/P Datasheet - Page 594

• Manufacturer Part Number: PIC16F688-E/P
• Description: IC MCU PIC FLASH 4KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162066 - HEADER INTRFC MPLAB ICD2 20PINAC162061 - HEADER INTRFC MPLAB ICD2 20PINDM163029 - BOARD PICDEM FOR MECHATRONICSAC162056 - HEADER INTERFACE ICD2 16F688ACICE0207 - MPLABICE 14P 300 MIL ADAPTER
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
Figure 30-10: Example SPI Master Mode Timing (CKE = 1)
Table 30-22:
DS31030A-page 30-24
Param.
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
No.
71A
72A
73A
71
72
73
74
75
76
78
79
80
81
(CKP = 0)
(CKP = 1)
SDI
SS
SCK
SCK
SDO
† Data in “Typ” column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
B
Symbol
2
B
Refer to
Example SPI Mode Requirements (Master Mode, CKE = 1)
Characteristic
SCK input high time
(slave mode)
SCK input low time
(slave mode)
Setup time of SDI data input to SCK
edge
Last clock edge of Byte1 to the 1st clock
edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise
time
SDO data output fall time
SCK output rise time
(master mode)
SCK output fall time (master mode)
SDO data output valid
after SCK edge
SDO data output setup to SCK edge
Figure 30-1
81
73
MSb IN
MSb
74
71
for load conditions.
75, 76
80
72
BIT6 - - - - - -1
BIT6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC16CXXX
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
PIC16CXXX
PIC16LCXXX
1.25T
1.25T
1.5T
LSb IN
LSb
Min
T
100
100
CY
40
40
—
—
—
—
—
CY
CY
CY
+ 40
+ 30
+ 30
79
78
Typ† Max Units
—
—
—
—
—
—
—
10
20
10
10
20
10
—
—
—
1997 Microchip Technology Inc.
100
25
45
25
25
45
25
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1
Note 1
Note 1
Conditions