PIC16F688-E/P Microchip Technology, PIC16F688-E/P Datasheet - Page 473

• Manufacturer Part Number: PIC16F688-E/P
• Description: IC MCU PIC FLASH 4KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162066 - HEADER INTRFC MPLAB ICD2 20PINAC162061 - HEADER INTRFC MPLAB ICD2 20PINDM163029 - BOARD PICDEM FOR MECHATRONICSAC162056 - HEADER INTERFACE ICD2 16F688ACICE0207 - MPLABICE 14P 300 MIL ADAPTER
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

25.6
25.6.1
25.6.2
1997 Microchip Technology Inc.
V
DD
Note 1: Location of optional filter capacitor.
VLCDADJ
100k
130k
Charge Pump
External R-Ladder
Voltage Generation
2: These values are provided for design guidance only and should be optimized to the application by
(2)
(2)
nominal
10 A
the designer.
There are two methods for LCD voltage generation, internal charge pump, or external resistor
ladder.
The LCD charge pump is shown in
base voltage from the varying battery voltage. This regulator is adjustable through the range by
connecting a variable external resistor from VLCDADJ to ground. The potentiometer provides
contrast adjustment for the LCD. This base voltage is connected to V
The charge pump boosts V
pump is not operating, V
tion for charge pump capacitor and potentiometer values.
The LCD module can also use an external resistor ladder (R-Ladder) to generate the LCD volt-
ages.
bit must be cleared to use an external R-Ladder.
Figure 25-8:
V
V
DD
DD
Figure 25-8
V
0.47 F
LCD
10k*
3
Charge Pump and Resistor Ladder Block Diagram
(2)
shows external connections for static and 1/3 bias. The VGEN (LCDCON<4>)
(1)
V
0.47 F
LCD
LCD
10k
10k
LCD
2
3 will be internally tied to V
Charge Pump
(2)
(2)
1 into V
(2)
(1)
(1)
Figure
V
0.47 F
LCD
LCD
2 = 2 * V
1
25-8. The 1.0V - 2.3V regulator will establish a stable
(2)
10k*
LCD
Section 25. LCD
1 and V
DD
. See the Electrical Specifications sec-
LCD
(1)
0.47 F
3 = 3 * V
C1
5k
5k
(2)
(2)
LCD
C2
(2)
1 on the charge pump.
LCD
DS31025A-page 25-15
1. When the charge
External
connections for
internal charge
pump, VGEN = 1.
External
External
connections for
external R-ladder,
1/3 Bias,
VGEN = 0.
connections for
external R-ladder,
Static Bias,
VGEN = 0.
SLPEN
LCDEN
25