PIC16F688-E/P Microchip Technology, PIC16F688-E/P Datasheet - Page 133

• Manufacturer Part Number: PIC16F688-E/P
• Description: IC MCU PIC FLASH 4KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/P

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162066 - HEADER INTRFC MPLAB ICD2 20PINAC162061 - HEADER INTRFC MPLAB ICD2 20PINDM163029 - BOARD PICDEM FOR MECHATRONICSAC162056 - HEADER INTERFACE ICD2 16F688ACICE0207 - MPLABICE 14P 300 MIL ADAPTER
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.5
1997 Microchip Technology Inc.
Context Saving During Interrupts
During an interrupt, only the return PC value is saved on the stack. Typically, users may wish to
save key registers during an interrupt e.g. W register and STATUS register. This has to be imple-
mented in software.
The action of saving information is commonly referred to as “PUSHing,” while the action of restor-
ing the information before the return is commonly referred to as “POPing.” These (PUSH, POP)
are not instruction mnemonics, but are conceptual actions. This action can be implemented by a
sequence of instructions. For ease of code transportability, these code segments can be made
into MACROs (see MPASM Assembler User’s Guide for details on creating macros).
Example 8-1
(such as the PIC16C77). The user register, W_TEMP, must be defined across all banks and must
be defined at the same offset from the bank base address (i.e., W_TEMP is defined at 0x70 -
0x7F in Bank0). The user register, STATUS_TEMP, must be defined in Bank0, in this example
STATUS_TEMP is also in Bank0.
The steps of
1.
2.
3.
4.
5.
If additional locations need to be saved before executing the Interrupt Service Routine (ISR)
code, they should be saved after the STATUS register is saved (step 2), and restored before the
STATUS register is restored (step 4).
Example 8-1: Saving the STATUS and W Registers in RAM
Stores the W register regardless of current bank.
Stores the STATUS register in Bank0.
Executes the Interrupt Service Routine (ISR) code.
Restores the STATUS (and bank select bit register).
Restores the W register.
MOVWF
SWAPF
MOVWF
:
: (Interrupt Service Routine (ISR) )
:
SWAPF
MOVWF
SWAPF
SWAPF
Example
stores and restores the STATUS and W registers for devices with common RAM
(for Devices with Common RAM)
W_TEMP
STATUS,W
STATUS_TEMP
STATUS_TEMP,W
STATUS
W_TEMP,F
W_TEMP,W
8-1:
; Copy W to a Temporary Register
;
; Swap STATUS nibbles and place
;
; Save STATUS to a Temporary register
;
; Swap original STATUS register value
;
; Restore STATUS register from
;
; Swap W_Temp nibbles and return
;
; Swap W_Temp to W to restore original
;
regardless of current bank
into W register
in Bank0
into W (restores original bank)
W register
value to W_Temp
W value without affecting STATUS
Section 8. Interrupts
DS31008A-page 8-11
8