EP9315-CBZ Cirrus Logic Inc, EP9315-CBZ Datasheet - Page 239

• Manufacturer Part Number: EP9315-CBZ
• Description: IC ARM9 SOC ENH UNIV 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Cpu Speed: 200MHz
• No. Of Timers: 5
• Digital Ic Case Style: BGA
• Supply Voltage Range: 1.65V To 1.94V, 3V To 3.6V
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Case: BGA
• Dc: 06+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1139

PixelMode
DS785UM1
TRBSW
31
15
Address: 0x8003_0054
Default: 0x0000_0000
Definition: Pixel Mode register
Bit Descriptions:
DSCAN
30
14
29
13
28
12
RSVD:
0:
TRBSW:
DSCAN:
C
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
This field should be written with a value that specifies the
number of words that the FIFO empties before the FIFO
requests that it be refilled. Values greater than 16 should
be used with extreme caution as they can cause the
Raster Engine to underflow, causing video jitter or other
visual defects.
Reserved - Unknown during read
Must be written as ‘0’
Two and Two-Thirds Red/Blue Swap - Read/Write
Writing a Two and two-thirds Red/Blue Swap value to this
bit selects the ordering of Red and Blue pixels for data
shifted displays:
0 - Normal: Blue is the low order bits followed by green
and red
1 - Reverse: Red is low order bits followed by green and
blue
Dual Scan - Read/Write
Raster Engine With Analog/LCD Integrated Timing and Interface
RSVD
24
8
M
23
7
22
6
21
5
20
S
4
19
3
EP93xx User’s Guide
18
2
17
P
1
16
7-57
0
0
7