MC9S08DZ60ACLF Freescale Semiconductor, MC9S08DZ60ACLF Datasheet - Page 185

• Manufacturer Part Number: MC9S08DZ60ACLF
• Description: IC MCU 60K FLASH 4K RAM 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08DZ60ACLF

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: S08DZ
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• For Use With: DEMO9S08DZ60 - BOARD DEMOEVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.5
This section describes how to initialize and configure the MCG module in application. The following
sections include examples on how to initialize the MCG and properly switch between the various available
modes.
8.5.1
The MCG comes out of reset configured for FEI mode with the BDIV set for divide-by-2. The internal
reference will stabilize in t
reference is stable, the FLL will acquire lock in t
8.5.1.1
Because the MCG comes out of reset in FEI mode, the only MCG modes which can be directly switched
to upon reset are FEE, FBE, and FBI modes (see
first configuring the MCG for one of these three initial modes. Care must be taken to check relevant status
bits in the MCGSC register reflecting all configuration changes within each mode.
To change from FEI mode to FEE or FBE modes, follow this procedure:
Freescale Semiconductor
1. Enable the external clock source by setting the appropriate bits in MCGC2.
2. If the RANGE bit (bit 5) in MCGC2 is set, set DIV32 in MCGC3 to allow access to the proper
3. Write to MCGC1 to select the clock mode.
4. Once the proper configuration bits have been set, wait for the affected bits in the MCGSC register
RDIV values.
— If entering FEE mode, set RDIV appropriately, clear the IREFS bit to switch to the external
— If entering FBE, clear the IREFS bit to switch to the external reference and change the CLKS
— The internal reference can optionally be kept running by setting the IRCLKEN bit. This is
to be changed appropriately, reflecting that the MCG has moved into the proper mode.
Initialization / Application Information
reference, and leave the CLKS bits at %00 so that the output of the FLL is selected as the
system clock source.
bits to %10 so that the external reference clock is selected as the system clock source. The
RDIV bits should also be set appropriately here according to the external reference frequency
because although the FLL is bypassed, it is still on in FBE mode.
useful if the application will switch back and forth between internal and external modes. For
minimum power consumption, leave the internal reference disabled while in an external clock
mode.
MCG Module Initialization Sequence
Initializing the MCG
If the internal reference is not already trimmed, the BDIV value should not
be changed to divide-by-1 without first trimming the internal reference.
Failure to do so could result in the MCU running out of specification.
irefst
microseconds before the FLL can acquire lock. As soon as the internal
MC9S08DZ128 Series Data Sheet, Rev. 1
fll_acquire
NOTE
Figure
8-9). Reaching any of the other modes requires
milliseconds.
Chapter 8 Multi-Purpose Clock Generator (S08MCGV2)
185