R5F21102DFP#U0 Renesas Electronics America, R5F21102DFP#U0 Datasheet - Page 121

IC R8C MCU FLASH 8K 32LQFP

R5F21102DFP#U0

Manufacturer Part Number
R5F21102DFP#U0
Description
IC R8C MCU FLASH 8K 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/10r
Datasheets

Specifications of R5F21102DFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LED, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21102DFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/10 Group
Rev.1.20 Jan 27, 2006
REJ09B0019-0120
Table 14.3 Repeat Mode Specifications
Figure 14.5 ADCON0 Register and ADCON1 Register in Repeat Mode
Function
Start condition
Stop condition
Interrupt request generation timing
Input pin
Reading of result of A/D converter
14.2 Repeat Mode
In repeat mode, the input voltage on one selected pin is A/D converted repeatedly. Table 14.3 lists the
specifications of repeat mode. Figure 14.5 shows the ADCON0 and ADCON1 registers in repeat
mode.
A D c o n t r o l r e g i s t e r 0
A D c o n t r o l r e g i s t e r 1
b 7 b 6 b 5 b 4 b 3 b 2 b1 b 0
b 7 b 6 b 5 b 4 b 3 b 2 b1 b 0
0
Item
N O T E S :
N O T E S :
1 . I f t h e A D C O N 1 r e g i s t e r i s r e w r i t t e n d u r i n g A / D c o n v e r s i o n , t h e c o n v e r s i o n r e s u l t i s i n d e t e r m i n a t e .
2 . I n r e p e a t m o d e , t h e B I T S b i t m u s t b e s e t t o “ 0 ” ( 8 - b i t m o d e ) .
3 . T h e
4 . I f t h e V C U T b i t i s r e s e t f r o m “ 0 ” ( V r e f u n c o n n e c t e d ) t o “ 1 ” ( V r e f c o n n e c t e d ) , w a i t f o r 1 µ s o r m o r e b e f o r e s t a r t i n g A / D
1 . I f t h e A D C O N 0 r e g i s t e r i s r e w r i t t e n d u r i n g A / D c o n v e r s i o n , t h e c o n v e r s i o n r e s u l t i s i n d e t e r m i n a t e .
2 . W h e n c h a n g i n g A / D o p e r a t i o n m o d e , s e t a n a l o g i n p u t p i n a g a i n .
3 . T h i s b i t i s v a l i d w h e n t h e C K S 1 b i t i n t h e A D C O N 1 r e g i s t e r i s s e t t o “ 0 ” .
0
c o n v e r s i o n .
1
0
A D
0
f r e q u e n c y m u s t b e 1 0 M H z o r l e s s .
1
0
page 109 of 180
0
0
0
( 1 )
( 1 )
Input voltage on one pin selected by CH2 to CH0 bits is A/D converted repeatedly
Set ADST bit to “1”
Set ADST bit to “0”
None generated
One of AN
Read AD register
Bit symbol
B i t s y m b o l
( b 6 - b 7 )
( b 2 - b 0 )
B I T S
C K S 1
V C U T
A D S T
C K S 0
MD
C H 0
C H 1
CH2
(b4)
( b 5 )
S y m b o l
A D C O N 0
S y m b o l
A D C O N 1
8 / 1 0 - b i t m o d e s e l e c t
b i t
Frequency select
bit 1
V r e f c o n n e c t b i t
Reserved bit
Reserved bit
0
A n a l o g i n p u t p i n s e l e c t
b i t
A D o p e r a t i o n m o d e s e l e c t
b i t
R e s e r v e d b i t
R e s e r v e d b i t
A/D conversion start flag
F r e q u e n c y s e l e c t b i t 0
( 2 )
to AN
( 2 )
( 2 )
(3)
Bit name
B i t n a m e
7
, as selected
A d d r e s s
A d d r e s s
0 0 D 6
0 0 D 7
( 4 )
1 6
1 6
( 3 )
0 : 8-bit mode
0 : CKS0 bit in ADCON0 register is valid
1 : f
1 : Vref connected
M u s t s e t t o “ 0 ”
M u s t s e t t o “ 0 ”
Specification
0 0 0 0 0 X X X
AD
A f t e r r e s e t
A f t e r r e s e t
b 2 b 1 b 0
0 0 0 : A N
0 0 1 : A N
0 1 0 : A N
0 1 1 : A N
1 0 0 : A N
1 0 1 : A N
1 1 0 : A N
1 1 1 : A N
1 : Repeat mode
0 : f
1 : f
0 : A/D conversion disabled
1 : A/D conversion started
Must set to “0”
Must set to “0”
is selected
0 0
A D
A D
1 6
/ 4 i s s e l e c t e d
/ 2 i s s e l e c t e d
0
1
2
3
4
5
6
7
2
i s s e l e c t e d
i s s e l e c t e d
i s s e l e c t e d
i s s e l e c t e d
i s s e l e c t e d
i s s e l e c t e d
i s s e l e c t e d
i s s e l e c t e d
Function
Function
R W
R W
RW
R W
R W
R W
R W
R W
R W
R W
R W
RW
R W
R W
R W
14.2 Repeat Mode

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