C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 64

• Manufacturer Part Number: C8051F988-GM
• Description: IC MCU 8BIT 4KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F988-GM

• Program Memory Type: FLASH
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 24-UQFN Exposed Pad, 24-HUQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, Enhanced UART, Enhanced SPI
• Maximum Clock Frequency: 7 KHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F996DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1959-5

C8051F99x-C8051F98x
5.
The ADC0 on C8051F980/6 and C8051F990/6 devices is a 300 ksps, 10-bit or 75 ksps, 12-bit successive-
approximation-register (SAR) ADC with integrated track-and-hold and programmable window detector.
ADC0 also has an autonomous low power Burst Mode which can automatically enable ADC0, capture and
accumulate samples, then place ADC0 in a low power shutdown mode without CPU intervention. It also
has a 16-bit accumulator that can automatically oversample and average the ADC results. See Section 5.4
for more details on using the ADC in 12-bit mode. C8051F982 and C8051F988 devices only support the
10-bit mode.
The ADC is fully configurable under software control via Special Function Registers. The ADC0 operates in
Single-ended mode and may be configured to measure various different signals using the analog
multiplexer described in “5.7. ADC0 Analog Multiplexer” on page 81. The voltage reference for the ADC is
selected as described in “5.9. Voltage and Ground Reference Options” on page 86.
64
Autonomous Low Power Burst Mode
SAR ADC with 16-bit Auto-Averaging Accumulator and
ADC0PWR
ADC0TK
AMUX0
From
Burst Mode Logic
AIN+
Figure 5.1. ADC0 Functional Block Diagram
ADC0CF
10/12-Bit
ADC
VDD
SAR
ADC0GTH ADC0GTL
ADC0LTH
Rev. 1.0
ADC0CN
ADC0LTL
Conversion
Start
100
000
001
010
011
32
16-Bit Accumulator
AD0WINT
Compare
W indow
CNVSTR Input
AD0BUSY (W )
Timer 0 Overflow
Timer 2 Overflow
Timer 3 Overflow
Logic