C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 176

• Manufacturer Part Number: C8051F988-GM
• Description: IC MCU 8BIT 4KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F988-GM

• Program Memory Type: FLASH
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 24-UQFN Exposed Pad, 24-HUQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 512 B
• Interface Type: I2C, SMBus, Enhanced UART, Enhanced SPI
• Maximum Clock Frequency: 7 KHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F996DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1959-5

C8051F99x-C8051F98x
SFR Definition 16.5. CRC0CNT: CRC0 Automatic Flash Sector Count
SFR Page = All; SFR Address = 0x9A
176
Name
Reset
Bit
7:5
4:0 CRC0CNT[4:0] Automatic CRC Calculation Block Count.
Type
Bit
Unused
Name
7
0
Read = 00b; Write = Don’t Care.
These bits specify the number of Flash blocks to include in an automatic CRC cal-
culation. The last address of the last Flash block included in the automatic CRC
calculation is (CRC0ST+CRC0CNT) x Block Size - 1.
Notes:
6
0
1. The block size is 256 bytes.
2. The maximum number of blocks that may be computed in a single operation is 31.
To compute a CRC on all 32 blocks, perform one operation on 31 blocks, then
perform a second operation on 1 block without clearing the CRC result.
5
0
Rev. 1.0
4
0
Function
3
0
CRC0CNT[4:0]
R/W
2
0
1
0
0
0