C8051F988-GM Silicon Laboratories Inc, C8051F988-GM Datasheet - Page 112

IC MCU 8BIT 4KB FLASH 24QFN

C8051F988-GM

Manufacturer Part Number
C8051F988-GM
Description
IC MCU 8BIT 4KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F988-GM

Program Memory Type
FLASH
Program Memory Size
4KB (4K x 8)
Package / Case
24-UQFN Exposed Pad, 24-HUQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
512 B
Interface Type
I2C, SMBus, Enhanced UART, Enhanced SPI
Maximum Clock Frequency
7 KHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F996DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1959-5
C8051F99x-C8051F98x
SFR Definition 8.11. CS0MD1: Capacitive Sense Mode 1
SFR Page = 0x0; SFR Address = 0xAF
112
Name
Reset
5:4
2:0
Bit
Type
7
6
3
Bit
CS0CG[2:0]
CS0DR[1:0]
Reserved
Reserved
CS0POL
CS0WOI
Name
R/W
7
0
CS0POL
Must write 0.
CS0 Digital Comparator Polarity Select.
0: The digital comparator generates an interrupt if the conversion is greater than
the threshold.
1: The digital comparator generates an interrupt if the conversion is less than or
equal to the threshold.
CS0 Double Reset Select.
These bits adjust the secondary CS0 reset time. For most touch-sensitive
switches, the default (fastest) value is sufficient. See the discussion in Section
8.13 for more information.
00: No additional time is used for secondary reset.
01: An additional 0.75 µs is used for secondary reset.
10: An additional 1.5 µs is used for secondary reset.
11: An additional 2.25 µs is used for secondary reset.
CS0 Wake on Interrupt Configuration.
0: Wake-up event generated on digital comparator interrupt only.
1: Wake-up event generated on end of scan or digital comparator interrupt.
CS0 Capacitance Gain Select.
These bits select the gain applied to the capacitance measurement. Lower gain
values increase the size of the capacitance that can be measured with the CS0
module. The capacitance gain is equivalent to CS0CG[2:0] + 1.
000: Gain = 1x
001: Gain = 2x
010: Gain = 3x
011:
100: Gain = 5x
101: Gain = 6x
110:
111:
6
0
Gain = 4x
Gain = 7x
Gain = 8x (default)
5
0
CS0DR
Rev. 1.0
4
0
Description
CS0WOI
3
0
R/W
2
1
CS0CG[2:0]
R/W
1
1
R/W
0
1

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