ST72F324BJ6T6 STMicroelectronics, ST72F324BJ6T6 Datasheet - Page 89

• Manufacturer Part Number: ST72F324BJ6T6
• Description: IC MCU 8BIT 32K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BJ6T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5590

ST72324B-Auto
10.3.6
10.3.7
Summary of timer modes
Table 48.
1. See note 4 in
2. See note 5 in
3. See note 4 in
16-bit timer registers
Each timer is associated with three control and status registers, and with six pairs of data
registers (16-bit values) relating to the two input captures, the two output compares, the
counter and the alternate counter.
Control Register 1 (CR1)
Table 49.
Input Capture
(1 and/or 2)
Output Compare
(1 and/or 2)
One Pulse mode
PWM mode
CR1
Bit
M
7
6
5
ICIE
R/W
7
Mode
Name
OCIE
TOIE
ICIE
Summary of timer modes
CR1 register description
Input Capture Interrupt Enable
Output Compare Interrupt Enable
Timer Overflow Interrupt Enable
One Pulse mode on page
One Pulse mode on page
Pulse Width Modulation mode on page
OCIE
R/W
0: Interrupt is inhibited.
1: A timer interrupt is generated whenever the ICF1 or ICF2 bit of the SR register is
set.
0: Interrupt is inhibited.
1: A timer interrupt is generated whenever the OCF1 or OCF2 bit of the SR register
is set.
0: Interrupt is inhibited.
1: A timer interrupt is enabled whenever the TOF bit of the SR register is set.
6
Capture 1
Input
Yes
No
TOIE
R/W
5
Doc ID13466 Rev 4
84.
84.
Not recommended
Not recommended
FOLV2
R/W
4
Capture 2
Input
Yes
86.
Timer resources
Function
FOLV1
R/W
3
(1)
(3)
Compare 1
OLVL2
R/W
Output
2
Yes
No
Reset value: 0000 0000 (00h)
On-chip peripherals
IEDG1
R/W
1
Compare 2
Partially
Output
Yes
No
OLVL1
R/W
(2)
0
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