AT91SAM9XE128-QU Atmel, AT91SAM9XE128-QU Datasheet - Page 752

• Manufacturer Part Number: AT91SAM9XE128-QU
• Description: MCU ARM9 128K FLASH 208-PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE128-QU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

41.3.2
Table 41-3.
Table 41-4.
752
Mode
RGB 8:8:8
RGB 5:6:5
Mode
RGB 5:6:5
AT91SAM9XE128/256/512 Preliminary
Data Ordering
RGB Format in Default Mode, RGB_CFG = 00, No Swap
RGB Format, RGB_CFG = 10 (Mode 2), No Swap
Byte
Byte 0
Byte 1
Byte 2
Byte 3
Byte 0
Byte 1
Byte 2
Byte 3
Byte
Byte 0
Byte 1
Byte 2
Byte 3
The RGB color space format is required for viewing images on a display screen preview, and the
YCbCr color space format is required for encoding.
All the sensors do not output the YCbCr or RGB components in the same order. The ISI allows
the user to program the same component order as the sensor, reducing software treatments to
restore the right format.
Table 41-2.
Mode
Default
Mode1
Mode2
Mode3
D7
R7(i)
G7(i)
R7(i+1)
R4(i)
G2(i)
R4(i+1)
G2(i+1)
D7
G2(i)
G2(i+1)
B4(i+1)
B7(i)
B4(i)
Data Ordering in YCbCr Mode
D6
R6(i)
G6(i)
B6(i)
R6(i+1)
R3(i)
G1(i)
R3(i+1)
G1(i+1)
D6
G1(i)
B3(i)
G1(i+1)
B3(i+1)
D5
R5(i)
G5(i)
B5(i)
R5(i+1)
R2(i)
G0(i)
R2(i+1)
G0(i+1)
D5
G0(i)
B2(i)
G0(i+1)
B2(i+1)
Byte 0
Cb(i)
Cr(i)
Y(i)
Y(i)
D4
R4(i)
G4(i)
B4(i)
R4(i+1)
R1(i)
B4(i)
R1(i+1)
B4(i+1)
D4
R4(i)
B1(i)
R4(i+1)
B1(i+1)
Y(i)
Y(i)
Cb(i)
Cr(i)
Byte 1
D3
R3(i)
G3(i)
B3(i)
R3(i+1)
R0(i+1)
B3(i+1)
D3
R3(i)
R0(i)
B3(i)
B0(i)
R3(i+1)
B0(i+1)
D2
R2(i)
G2(i)
B2(i)
R2(i+1)
G5(i)
B2(i)
G5(i+1)
B2(i+1)
D2
R2(i)
G5(i)
R2(i+1)
G5(i+1)
Cr(i)
Cb(i)
Y(i+1)
Y(i+1)
Byte 2
D1
R1(i)
G1(i)
B1(i)
R1(i+1)
G4(i)
B1(i)
G4(i+1)
B1(i+1)
D1
R1(i)
G4(i)
R1(i+1)
G4(i+1)
6254C–ATARM–22-Jan-10
Byte 3
Y(i+1)
Y(i+1)
Cr(i)
Cb(i)
D0
R0(i)
G0(i)
B0(i)
R0(i+1)
G3(i)
B0(i)
G3(i+1)
B0(i+1)
D0
R0(i)
G3(i)
R0(i+1)
G3(i+1)