AT91SAM9XE128-QU Atmel, AT91SAM9XE128-QU Datasheet - Page 718

MCU ARM9 128K FLASH 208-PQFP

AT91SAM9XE128-QU

Manufacturer Part Number
AT91SAM9XE128-QU
Description
MCU ARM9 128K FLASH 208-PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9XE128-QU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, EBI, I2S, SPI, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
96
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9XE128-QU
Manufacturer:
Atmel
Quantity:
10 000
39.5.2.7
718
AT91SAM9XE128/256/512 Preliminary
Using Endpoints With Ping-pong Attributes
During isochronous transfer, using an endpoint with ping-pong attributes is obligatory. To be
able to guarantee a constant bandwidth, the microcontroller must read the previous data pay-
load sent by the host, while the current data payload is received by the USB device. Thus two
banks of memory are used. While one is available for the microcontroller, the other one is locked
by the USB device.
Figure 39-10. Bank Swapping in Data OUT Transfers for Ping-pong Endpoints
When using a ping-pong endpoint, the following procedures are required to perform Data OUT
transactions:
1. The host generates a Data OUT packet.
2. This packet is received by the USB device endpoint. It is written in the endpoint’s FIFO
3. The USB device sends an ACK PID packet to the host. The host can immediately send
4. The microcontroller is notified that the USB device has received a data payload, polling
5. The number of bytes available in the FIFO is made available by reading RXBYTECNT
6. The microcontroller transfers out data received from the endpoint’s memory to the
7. The microcontroller notifies the USB peripheral device that it has finished the transfer
8. A third Data OUT packet can be accepted by the USB peripheral device and copied in
9. If a second Data OUT packet has been received, the microcontroller is notified by the
Bank 0.
a second Data OUT packet. It is accepted by the device and copied to FIFO Bank 1.
RX_DATA_BK0 in the endpoint’s UDP_CSRx register. An interrupt is pending for this
endpoint while RX_DATA_BK0 is set.
in the endpoint’s UDP_CSRx register.
microcontroller’s memory. Data received is made available by reading the endpoint’s
UDP_FDRx register.
by clearing RX_DATA_BK0 in the endpoint’s UDP_CSRx register.
the FIFO Bank 0.
flag RX_DATA_BK1 set in the endpoint’s UDP_CSRx register. An interrupt is pending
for this endpoint while RX_DATA_BK1 is set.
1 st Data Payload
2 nd Data Payload
3 rd Data Payload
Microcontroller
Write and Read at the Same Time
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Write
USB Device
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Read
USB Bus
2 nd Data Payload
3 rd Data Payload
1 st Data Payload
Data IN Packet
Data IN Packet
Data IN Packet
6254C–ATARM–22-Jan-10

Related parts for AT91SAM9XE128-QU