ATMEGA165P-16MU Atmel, ATMEGA165P-16MU Datasheet - Page 361

• Manufacturer Part Number: ATMEGA165P-16MU
• Description: IC AVR MCU 16K 16MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165P-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8019K–AVR–11/10
22 JTAG Interface and On-chip Debug System ..................................... 222
23 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 229
24 Boot Loader Support – Read-While-Write Self-Programming ......... 250
25 Memory Programming ......................................................................... 266
21.5 Prescaling and Conversion Timing .....................................................................207
21.6 Changing Channel or Reference Selection ........................................................209
21.7 ADC Noise Canceler ..........................................................................................211
21.8 ADC Conversion Result .....................................................................................215
21.9 Register Description ...........................................................................................217
22.1 Overview ............................................................................................................222
22.2 TAP – Test Access Port .....................................................................................223
22.3 TAP Controller ....................................................................................................225
22.4 Using the Boundary-scan Chain .........................................................................226
22.5 Using the On-chip Debug System ......................................................................226
22.6 On-chip Debug Specific JTAG Instructions ........................................................227
22.7 Using the JTAG Programming Capabilities ........................................................227
22.8 Bibliography ........................................................................................................228
22.9 Register Description ...........................................................................................228
23.1 Features .............................................................................................................229
23.2 System Overview ...............................................................................................229
23.3 Data Registers ....................................................................................................230
23.4 Boundary-scan Specific JTAG Instructions ........................................................231
23.5 Boundary-scan Chain .........................................................................................232
23.6 ATmega165P Boundary-scan Order ..................................................................242
23.7 Boundary-scan Description Language Files .......................................................248
23.8 Register Description ...........................................................................................249
24.1 Features .............................................................................................................250
24.2 Overview ............................................................................................................250
24.3 Application and Boot Loader Flash Sections ......................................................250
24.4 Read-While-Write and No Read-While-Write Flash Sections .............................251
24.5 Boot Loader Lock Bits ........................................................................................254
24.6 Entering the Boot Loader Program .....................................................................255
24.7 Addressing the Flash During Self-Programming ................................................256
24.8 Self-Programming the Flash ...............................................................................257
24.9 Register Description ...........................................................................................264
ATmega165P
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