ATMEGA165P-16MU Atmel, ATMEGA165P-16MU Datasheet - Page 129

IC AVR MCU 16K 16MHZ 64-QFN

ATMEGA165P-16MU

Manufacturer Part Number
ATMEGA165P-16MU
Description
IC AVR MCU 16K 16MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA165P-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
16.1
16.2
8019K–AVR–11/10
Features
Overview
Timer/Counter2 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simpli-
fied block diagram of the 8-bit Timer/Counter is shown in
of I/O pins, refer to
I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are
listed in the
Figure 16-1. 8-bit Timer/Counter Block Diagram
Single Compare Unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV2 and OCF2A)
Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
Status flags
“Register Description” on page
Timer/Counter
TCNTn
OCRnx
=
“Pinout ATmega165P” on page
ASSRn
direction
count
clear
BOTTOM
Synchronized Status flags
= 0
Control Logic
=
TCCRnx
TOP
asynchronous mode
0xFF
143.
select (ASn)
2. CPU accessible I/O Registers, including
clk
Tn
Synchronization Unit
Figure
OCnx
(Int.Req.)
Generation
Prescaler
Waveform
16-1. For the actual placement
ATmega165P
Oscillator
T/C
clk
OCnx
TOVn
(Int.Req.)
clk
clk
ASY
I/O
I/O
TOSC2
TOSC1
129

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