ATMEGA165P-16MU Atmel, ATMEGA165P-16MU Datasheet - Page 306

• Manufacturer Part Number: ATMEGA165P-16MU
• Description: IC AVR MCU 16K 16MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165P-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.8
8019K–AVR–11/10
SPI Timing Characteristics
Table 26-7.
Notes:
See
Table 26-8.
Note:
Symbol
t
t
t
t
XLOL
BVDV
OLDV
OHDZ
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 26-7 on page 307
1. t
2. t
1. In SPI Programming mode the minimum SCK high/low period is:
Description
SCK period
SCK high/low
Rise/Fall time
Setup
Hold
Out to SCK
SCK to out
SCK to out high
SS low to out
SCK period
SCK high/low
Rise/Fall time
Setup
Hold
SCK to out
SCK to SS high
SS high to tri-state
SS low to SCK
commands.
- 2 t
- 3 t
WLRH
WLRH_CE
Parameter
XTAL1 Low to OE Low
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
Parallel Programming Characteristics, V
SPI Timing Parameters
CLCL
CLCL
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
for f
for f
(1)
is valid for the Chip Erase command.
CK
CK
< 12 MHz
> 12 MHz
and
Figure 26-8 on page 307
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
20 • t
4 • t
2 • t
Min
10
t
20
ck
ck
ck
ck
CC
= 5V ±10% (Continued)
for details.
See
50% duty cycle
0.5 • t
Min
Table 17-5
0
0
Typ
3.6
1.6
10
10
10
10
15
15
10
sck
ATmega165P
Typ
Max
250
250
250
Max
Units
ns
ns
µs
ns
306