ATMEGA165P-16MU Atmel, ATMEGA165P-16MU Datasheet - Page 133

IC AVR MCU 16K 16MHZ 64-QFN

ATMEGA165P-16MU

Manufacturer Part Number
ATMEGA165P-16MU
Description
IC AVR MCU 16K 16MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA165P-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.6
8019K–AVR–11/10
Compare Match Output Unit
The setup of the OC2A should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC2A value is to use the Force Output Com-
pare (FOC2A) strobe bit in Normal mode. The OC2A Register keeps its value even when
changing between Waveform Generation modes.
Be aware that the COM2A[1:0] bits are not double buffered together with the compare value.
Changing the COM2A[1:0] bits will take effect immediately.
The Compare Output mode (COM2A[1:0]) bits have two functions. The Waveform Generator
uses the COM2A[1:0] bits for defining the Output Compare (OC2A) state at the next compare
match. Also, the COM2A[1:0] bits control the OC2A pin output source.
plified schematic of the logic affected by the COM2A[1:0] bit setting. The I/O Registers, I/O bits,
and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port Control Regis-
ters (DDR and PORT) that are affected by the COM2A[1:0] bits are shown. When referring to the
OC2A state, the reference is for the internal OC2A Register, not the OC2A pin.
Figure 16-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC2A) from the Waveform
Generator if either of the COM2A[1:0] bits are set. However, the OC2A pin direction (input or
output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direc-
tion Register bit for the OC2A pin (DDR_OC2A) must be set as output before the OC2A value is
visible on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC2A state before the
output is enabled. Note that some COM2A[1:0] bit settings are reserved for certain modes of
operation.
COMnx1
COMnx0
FOCnx
clk
I/O
See “Register Description” on page 143.
Waveform
Generator
D
D
PORT
D
DDR
OCnx
Q
Q
Q
1
0
ATmega165P
Figure 16-4
shows a sim-
OCnx
Pin
133

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