DSPIC33FJ32GS406-I/PT Microchip Technology, DSPIC33FJ32GS406-I/PT Datasheet - Page 331

IC MCU/DSP 32KB FLASH 64TQFP

DSPIC33FJ32GS406-I/PT

Manufacturer Part Number
DSPIC33FJ32GS406-I/PT
Description
IC MCU/DSP 32KB FLASH 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ32GS406-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SCI, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, QEI, POR, PWM, WDT
Number Of I /o
58
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Core Frequency
40MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
53
Flash Memory Size
32KB
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ32GS406-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 23-1:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-9
bit 8
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
Note 1: DACOUT can be associated only with a single comparator at any given time. The software must ensure
CMPON
R/W-0
R/W-0
INSEL<1:0>
that multiple comparators do not enable the DAC output by setting their respective DACOE bit.
CMPON: Comparator Operating Mode bit
1 = Comparator module is enabled
0 = Comparator module is disabled (reduces power consumption)
Unimplemented: Read as ‘0’
CMPSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode.
0 = Continue module operation in Idle mode
If a device has multiple comparators, any CMPSIDL bit set to ‘1’ disables ALL comparators while in
Idle mode.
Reserved: Read as ‘0’
DACOE: DAC Output Enable
1 = DAC analog voltage is output to DACOUT pin
0 = DAC analog voltage is not connected to DACOUT pin
INSEL<1:0>: Input Source Select for Comparator bits
00 = Select CMPxA input pin
01 = Select CMPxB input pin
10 = Select CMPxC input pin
11 = Select CMPxD input pin
EXTREF: Enable External Reference bit
1 = External source provides reference to DAC (maximum DAC voltage determined by external
0 = Internal reference sources provide reference to DAC (maximum DAC voltage determined by
Reserved: Read as ‘0’
CMPSTAT: Current State of Comparator Output Including CMPPOL Selection bit
Reserved: Read as ‘0’
CMPPOL: Comparator Output Polarity Control bit
1 = Output is inverted
0 = Output is non-inverted
RANGE: Selects DAC Output Voltage Range bit
1 = High Range: Max DAC Value = AV
0 = Low Range: Max DAC Value = INTREF, 1.2V, ±1%
R/W-0
voltage source)
RANGE bit setting)
U-0
CMPCONx: COMPARATOR CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
CMPSIDL
EXTREF
R/W-0
R/W-0
U-0
U-0
Preliminary
DD
/2, 1.65V at 3.3V AV
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CMPSTAT
R/W-0
U-0
(1)
DD
U-0
U-0
x = Bit is unknown
CMPPOL
R/W-0
U-0
DS70591C-page 331
DACOE
RANGE
R/W-0
R/W-0
bit 8
bit 0

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