PIC18F86J50-I/PT Microchip Technology, PIC18F86J50-I/PT Datasheet - Page 86

• Manufacturer Part Number: PIC18F86J50-I/PT
• Description: IC PIC MCU FLASH 32KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 65
• Ram Memory Size: 3904Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J50 FAMILY
TABLE 5-5:
DS39775C-page 86
TRISJ
TRISH
TRISG
TRISF
TRISE
TRISD
TRISC
TRISB
TRISA
LATJ
LATH
LATG
LATF
LATE
LATD
LATC
LATB
LATA
PORTJ
PORTH
PORTG
PORTF
PORTE
PORTD
PORTC
PORTB
PORTA
SPBRGH1
BAUDCON1
SPBRGH2
BAUDCON2
TMR3H
TMR3L
T3CON
TMR4
PR4
CVRCON
T4CON
Legend:
Note
File Name
(2)
(7)
(7)
(7)
/
(7)
(7)
(7)
1:
2:
3:
4:
5:
6:
7:
8:
(3)
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Bold indicates shared-access SFRs.
Bit 21 of the PC is only available in Serial Programming modes.
Default (legacy) SFR at this address, available when WDTCON<4> = 0.
Configuration SFR, overlaps with default SFR at this address; available only when WDTCON<4> = 1.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
Alternate names and definitions for these bits when the MSSP module is operating in I
Masking Modes” for details
These bits and/or registers are only available in 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 80-pin devices.
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the physical registers and addresses, but have different
functions determined by the module’s operating mode. See Section 11.1.2 “Data Registers” for more information.
Timer3 Register High Byte
Timer3 Register Low Byte
Timer4 Register
EUSART1 Baud Rate Generator Register High Byte
EUSART2 Baud Rate Generator Register High Byte
Timer4 Period Register
ABDOVF
ABDOVF
TRISH7
TRISD7
TRISC7
TRISF7
TRISE7
TRISB7
CVREN
TRISJ7
LATH7
LATD7
LATC7
LATF7
LATE7
LATB7
RDPU
LATJ7
RD16
Bit 7
RH7
RD7
RC7
RF7
RE7
RB7
RJ7
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F87J50 FAMILY) (CONTINUED)
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0
T3CCP2
TRISH6
TRISF6
TRISE6
TRISD6
TRISC6
TRISB6
CVROE
TRISJ6
LATH6
LATF6
LATE6
LATD6
LATC6
LATB6
RCIDL
RCIDL
LATJ6
REPU
Bit 6
RH6
RF6
RE6
RD6
RC6
RB6
RJ6
—
—
—
—
—
T3CKPS1
TRISH5
TRISD5
TRISC5
TRISA5
RJPU
TRISJ5
TRISF5
TRISE5
TRISB5
DTRXP
DTRXP
LATH5
LATE5
LATD5
LATC5
LATB5
LATJ5
LATF5
LATA5
CVRR
Bit 5
RH5
RE5
RD5
RC5
RB5
RA5
RJ5
RF5
—
—
(7)
T3CKPS0
TRISH4
TRISG4
TRISD4
TRISC4
TRISF4
TRISE4
TRISB4
TRISA4
CVRSS
TRISJ4
LATH4
LATG4
LATD4
LATC4
LATF4
LATE4
LATB4
LATA4
LATJ4
SCKP
SCKP
Bit 4
RH4
RG4
RD4
RC4
RF4
RE4
RB4
RA4
RJ4
T3CCP1
TRISH3
TRISG3
TRISE3
TRISD3
TRISC3
TRISB3
TRISA3
TRISJ3
TRISF3
BRG16
BRG16
LATH3
LATG3
LATE3
LATD3
LATC3
LATB3
LATJ3
LATF3
LATA3
CVR3
Bit 3
RG3
RH3
RE3
RD3
RC3
RB3
RA3
RJ3
RF3
TMR4ON
T3SYNC
TRISH2
TRISG2
TRISD2
TRISC2
TRISF2
TRISE2
TRISB2
TRISA2
TRISJ2
LATH2
LATG2
LATD2
LATC2
LATJ2
LATF2
LATE2
LATB2
LATA2
CVR2
Bit 2
RH2
RG2
RE2
RD2
RC2
RB2
RA2
RJ2
RF2
—
—
2
C™ Slave mode. See Section 19.4.3.2 “Address
T4CKPS1
TMR3CS
TRISG1
TRISH1
TRISE1
TRISD1
TRISC1
TRISB1
TRISA1
TRISJ1
LATG1
LATH1
LATE1
LATD1
LATC1
LATB1
LATA1
LATJ1
CVR1
WUE
WUE
Bit 1
RG1
RH1
RE1
RD1
RC1
RB1
RA1
RJ1
—
—
—
© 2009 Microchip Technology Inc.
T4CKPS0
TMR3ON
TRISH0
TRISG0
TRISE0
TRISD0
TRISC0
TRISB0
TRISA0
TRISJ0
ABDEN
ABDEN
LATH0
LATG0
LATE0
LATD0
LATC0
LATB0
LATJ0
LATA0
CVR0
Bit 0
RH0
RG0
RE0
RD0
RC0
RB0
RA0
RJ0
—
—
—
1111 1111
1111 1111
---1 1111
111- -1--
1111 1111
1111 1111
1111 1111
1111 1111
--11 1111
xxxx xxxx
xxxx xxxx
---x xxxx
xxxx xx--
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
--xx xxxx
xxxx xxxx
0000 xxxx
000x xxxx
x00x x0--
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
--0x 0000
0000 0000
0100 0-00
0000 0000
0100 0-00
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
0000 0000
-000 0000
POR, BOR
Value on
Details
64, 165
64, 163
64, 160
64, 157
64, 154
64, 151
64, 148
64, 145
64, 142
64, 165
64, 163
64, 160
64, 157
64, 154
64, 151
64, 148
64, 145
64, 142
65, 165
65, 163
65, 160
65, 157
65, 154
65, 151
65, 148
65, 145
65, 142
65, 283
65, 283
65, 283
65, 283
65, 208
65, 208
65, 208
65, 207
65, 208
65, 346
65, 207
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