PIC18F86J50-I/PT Microchip Technology, PIC18F86J50-I/PT Datasheet - Page 360

• Manufacturer Part Number: PIC18F86J50-I/PT
• Description: IC PIC MCU FLASH 32KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 65
• Ram Memory Size: 3904Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J50 FAMILY
25.3
All of the PIC18F87J10 family devices power their core
digital logic at a nominal 2.5V. For designs that are
required to operate at a higher typical voltage, such as
3.3V, all devices in the PIC18F87J10 family incorporate
an on-chip regulator that allows the device to run its
core logic from V
The regulator is controlled by the ENVREG pin. Tying
V
vides power to the core from the other V
the regulator is enabled, a low-ESR filter capacitor
must be connected to the V
(Figure 25-2). This helps to maintain the stability of the
regulator. The recommended value for the filter capac-
itor is provided in Section 28.3 “DC Characteristics:
PIC18F87J50 Family (Industrial)”.
If ENVREG is tied to V
this case, separate power for the core logic at a nomi-
nal 2.5V must be supplied to the device on the
V
levels, typically 3.3V. Alternatively, the V
and V
nominal voltage. Refer to Figure 25-2 for possible
configurations.
25.3.1
When it is enabled, the on-chip regulator provides a con-
stant voltage of 2.5V nominal to the digital core logic.
The regulator can provide this level from a VDD of about
2.5V, all the way up to the device’s V
have the capability to boost V
order to prevent “brown-out” conditions, when the volt-
age drops too low for the regulator, the regulator enters
Tracking mode. In Tracking mode, the regulator output
follows V
The on-chip regulator includes a simple Low-Voltage
Detect (LVD) circuit. If V
approximately 2.45V on V
Low-Voltage Detect Interrupt Flag, LVDIF (PIR2<2>).
This can be used to generate an interrupt and put the
application into a low-power operational mode, or trig-
ger an orderly shutdown. Low-Voltage Detection is only
available when the regulator is enabled.
The Low-Voltage Detect interrupt is edge-sensitive and
will only be set once per falling edge of V
ware can clear the interrupt flag, but a new interrupt will
not be generated until V
then falls below, the 2.45V nominal threshold. Device
Resets will reset the interrupt flag to ‘0’, even if
V
enabled, the LVDSTAT bit in the WDTCON register can
be polled to determine the current level of V
DS39775C-page 360
DD
DDCORE
DDCORE
to the pin enables the regulator, which in turn, pro-
DD
DD
On-Chip Voltage Regulator
pins can be tied together to operate at a lower
/V
is less than 2.45V. When the regulator is
, with a typical voltage drop of 100 mV.
CAP
VOLTAGE REGULATOR TRACKING
MODE AND LOW-VOLTAGE
DETECTION
pin to run the I/O pins at higher voltage
DD
.
SS
DDCORE
DD
, the regulator is disabled. In
DDCORE
drops too low to maintain
DD
rises back above, and
levels below 2.5V. In
, the circuit sets the
DDCORE
DDMAX
DD
DDCORE
DDCORE
. It does not
pins. When
/V
DDCORE
CAP
. Firm-
/V
CAP
pin
.
FIGURE 25-2:
Note 1:
Regulator Enabled (ENVREG tied to V
Regulator Disabled (ENVREG tied to ground):
Regulator Disabled (V
2.5V
2.5V
C
(1)
(1)
F
3.3V
These are typical operating voltages. Refer
to Section 28.1 “DC Characteristics:
Supply Voltage” for the full operating
ranges of V
3.3V
(1)
V
ENVREG
V
V
CONNECTIONS FOR THE
ON-CHIP REGULATOR
DD
DDCORE
SS
DD
© 2009 Microchip Technology Inc.
DD
PIC18F87J50
V
ENVREG
V
V
V
ENVREG
V
V
DD
DDCORE
SS
and V
DD
DDCORE
SS
tied to V
PIC18F87J50
PIC18F87J50
/V
DDCORE
CAP
/V
/V
DDCORE
CAP
CAP
.
DD
):
):