PIC18F86J50-I/PT Microchip Technology, PIC18F86J50-I/PT Datasheet - Page 84

• Manufacturer Part Number: PIC18F86J50-I/PT
• Description: IC PIC MCU FLASH 32KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 65
• Ram Memory Size: 3904Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J50 FAMILY
TABLE 5-5:
DS39775C-page 84
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
REFOCON
CM1CON
CM2CON
RCON
TMR1H
ODCON1
TMR1L
ODCON2
T1CON
ODCON3
TMR2
PADCFG1
PR2
MEMCON
T2CON
SSP1BUF
SSP1ADD/
SSP1MSK
SSP1STAT
SSP1CON1
SSP1CON2
ADRESH
ADRESL
ADCON0
ANCON1
ADCON1
ANCON0
WDTCON
Legend:
Note
File Name
(2)
(2)
/
(2)
(2)
(2)
1:
2:
3:
4:
5:
6:
7:
8:
/
(2)
(3)
(2)
(3)
(3)
/
(3)
(3)
(2)
/
/
(3)
(3)
(5)
(3)
/
/
/
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Bold indicates shared-access SFRs.
Bit 21 of the PC is only available in Serial Programming modes.
Default (legacy) SFR at this address, available when WDTCON<4> = 0.
Configuration SFR, overlaps with default SFR at this address; available only when WDTCON<4> = 1.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
Alternate names and definitions for these bits when the MSSP module is operating in I
Masking Modes” for details
These bits and/or registers are only available in 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 80-pin devices.
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the physical registers and addresses, but have different
functions determined by the module’s operating mode. See Section 11.1.2 “Data Registers” for more information.
Timer0 Register High Byte
Timer0 Register Low Byte
MSSP1 Receive Buffer/Transmit Register
A/D Result Register High Byte
A/D Result Register Low Byte
Indirect Data Memory Address Pointer 2 Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
MSSP1 Address Register (I
TMR0ON
REGSLP
PCFG15
VCFG1
PCFG7
ROON
EDBIS
WCOL
IDLEN
GCEN
GCEN
ADFM
MSK7
RD16
IPEN
Bit 7
CON
CON
SMP
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F87J50 FAMILY) (CONTINUED)
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
ACKSTAT
ACKSTAT
LVDSTAT
PCFG14
SSPOV
T08BIT
T1RUN
VCFG0
ADCAL
IRCF2
MSK6
Bit 6
COE
COE
CKE
—
—
—
—
—
—
—
—
—
2
ADMSK5
C™ Slave mode), MSSP1 Baud Rate Reload Register (I
T1CKPS1
ROSSLP
PCFG13
SSPEN
ACKDT
ACQT2
WAIT1
IRCF1
CPOL
CPOL
MSK5
CHS3
T0CS
Bit 5
D/A
CM
—
—
—
—
—
—
—
(6)
ADMSK4
T1CKPS0
CCP5OD
EVPOL1
EVPOL1
PCFG12
ROSEL
ACKEN
ADSHR
ACQT1
PCFG4
IRCF0
WAIT0
MSK4
CHS2
T0SE
Bit 4
CKP
RI
—
—
—
N
P
(6)
ADMSK3
T1OSCEN
CCP4OD
EVPOL0
EVPOL0
PCFG11
OSTS
RODIV3
SSPM3
ACQT0
PCFG3
RCEN
MSK3
CHS1
Bit 3
PSA
OV
TO
—
—
—
—
—
S
(4)
(6)
ADMSK2
ECCP3OD
TMR2ON
T1SYNC
PCFG10
RODIV2
SSPM2
ADCS2
PCFG2
T0PS2
CREF
CREF
MSK2
CHS0
Bit 2
PEN
R/W
PD
—
—
—
—
—
—
Z
(6)
2
ADMSK1
ECCP2OD
GO/DONE
C™ Slave mode. See Section 19.4.3.2 “Address
T2CKPS1
TMR1CS
RODIV1
SPI2OD
2
SSPM1
ADCS1
PCFG1
T0PS1
CCH1
CCH1
C™ Master mode)
MSK1
RSEN
SCS1
U2OD
WM1
Bit 1
POR
DC
UA
—
—
—
(6)
© 2009 Microchip Technology Inc.
ECCP1OD
T2CKPS0
SWDTEN
TMR1ON
PMPTTL
RODIV0
SPI1OD
SSPM0
ADCS0
PCFG0
T0PS0
ADON
CCH0
CCH0
U1OD
MSK0
SCS0
WMO
Bit 0
BOR
SEN
SEN
BF
—
C
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0110 q100
0-00 0000
0001 1111
0001 1111
0-11 1100
xxxx xxxx
---0 0000
xxxx xxxx
---- --00
0000 0000
---- --00
0000 0000
---- ---0
1111 1111
0-00 --00
-000 0000
xxxx xxxx
0000 0000
1111 1111
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 00--
0000 0000
0--0 0000
0x-0 ---0
POR, BOR
Value on
62, 243,
62, 233,
62, 233,
62, 233,
Details
62, 193
62, 193
62, 192
62, 345
62, 345
62, 196
62, 139
62, 196
62, 139
62, 196
62, 139
62, 201
62, 140
62, 201
62, 108
62, 201
62, 248
62, 250
63, 310
63, 310
63, 301
63, 301
63, 301
63, 301
63, 358
60, 62,
Page:
62, 91
62, 89
62, 44
62, 45
135
278
244
245
246
on