PIC18F86J50-I/PT Microchip Technology, PIC18F86J50-I/PT Datasheet - Page 394

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PIC18F86J50-I/PT

Manufacturer Part Number
PIC18F86J50-I/PT
Description
IC PIC MCU FLASH 32KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J50-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
65
Ram Memory Size
3904Byte
Cpu Speed
48MHz
No. Of Timers
5
No. Of
RoHS Compliant
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J50-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F87J50 FAMILY
POP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39775C-page 394
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TOS
Stack (1 level down)
TOS
PC
Q1
operation
Pop Top of Return Stack
POP
None
(TOS) → bit bucket
None
The TOS value is pulled off the return
stack and is discarded. The TOS value
then becomes the previous value that
was pushed onto the return stack.
This instruction is provided to enable
the user to properly manage the return
stack to incorporate a software stack.
1
1
POP
GOTO
0000
No
Q2
0000
NEW
POP TOS
=
=
=
=
value
Q3
0031A2h
014332h
014332h
NEW
0000
operation
No
Q4
0110
PUSH
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TOS
PC
PC
TOS
Stack (1 level down)
Q1
PC + 2 onto
return stack
Push Top of Return Stack
PUSH
None
(PC + 2) → TOS
None
The PC + 2 is pushed onto the top of
the return stack. The previous TOS
value is pushed down on the stack.
This instruction allows implementing a
software stack by modifying TOS and
then pushing it onto the return stack.
1
1
PUSH
PUSH
0000
Q2
© 2009 Microchip Technology Inc.
0000
operation
=
=
=
=
=
No
Q3
345Ah
0126h
345Ah
0124h
0126h
0000
operation
No
Q4
0101

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