TOOLSTICK540DC Silicon Laboratories Inc, TOOLSTICK540DC Datasheet - Page 76
![DAUGHTER CARD TOOLSTICK F540](/photos/9/25/92540/toolstick540dc_sml.jpg)
TOOLSTICK540DC
Manufacturer Part Number
TOOLSTICK540DC
Description
DAUGHTER CARD TOOLSTICK F540
Manufacturer
Silicon Laboratories Inc
Series
ToolStickr
Type
MCUr
Datasheets
1.TOOLSTICK540DC.pdf
(274 pages)
2.TOOLSTICK540DC.pdf
(16 pages)
3.TOOLSTICK540DC.pdf
(12 pages)
Specifications of TOOLSTICK540DC
Contents
Daughter Card
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
2.7 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
For Use With
336-1345 - TOOLSTICK BASE ADAPTER336-1182 - ADAPTER USB DEBUG FOR C8051FXXX
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1717
- Current page: 76 of 274
- Download datasheet (3Mb)
C8051F54x
10.2. Instruction Set
The instruction set of the CIP-51 System Controller is fully compatible with the standard MCS-51™ instruc-
tion set. Standard 8051 development tools can be used to develop software for the CIP-51. All CIP-51
instructions are the binary and functional equivalent of their MCS-51™ counterparts, including opcodes,
addressing modes and effect on PSW flags. However, instruction timing is different than that of the stan-
dard 8051.
10.2.1. Instruction and CPU Timing
In many 8051 implementations, a distinction is made between machine cycles and clock cycles, with
machine cycles varying from 2 to 12 clock cycles in length. However, the CIP-51 implementation is based
solely on clock cycle timing. All instruction timings are specified in terms of clock cycles.
Due to the pipelined architecture of the CIP-51, most instructions execute in the same number of clock
cycles as there are program bytes in the instruction. Conditional branch instructions take one less clock
cycle to complete when the branch is not taken as opposed to when the branch is taken. Table 10.1 is the
CIP-51 Instruction Set Summary, which includes the mnemonic, number of bytes, and number of clock
cycles for each instruction.
76
Rev. 1.1
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