TOOLSTICK540DC Silicon Laboratories Inc, TOOLSTICK540DC Datasheet - Page 167

DAUGHTER CARD TOOLSTICK F540

TOOLSTICK540DC

Manufacturer Part Number
TOOLSTICK540DC
Description
DAUGHTER CARD TOOLSTICK F540
Manufacturer
Silicon Laboratories Inc
Series
ToolStickr
Type
MCUr

Specifications of TOOLSTICK540DC

Contents
Daughter Card
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
2.7 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
For Use With
336-1345 - TOOLSTICK BASE ADAPTER336-1182 - ADAPTER USB DEBUG FOR C8051FXXX
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1717
SFR Definition 18.23. P2SKIP: Port 2 Skip
SFR Address = 0xD6; SFR Page = 0x0F
SFR Definition 18.24. P3: Port 3
SFR Address = 0xB0; SFR Page = All Pages; Bit-Addressable
Note: P2.2-P2.7 are only available on the 32-pin packages.
Note: Port P3.0 is only available on the 32-pin packages.
Name
Reset
Name
Reset
Bit
7:0
Bit
7:1
Type
Type
0
Bit
Bit
Unused
P2SKIP[7:0]
Name
P3[0]
Name
R
7
0
7
1
Read = 0000000b; Write = Don’t Care.
Port 3 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
Port 2 Crossbar Skip Enable Bits.
These bits select Port 2 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
R
6
0
6
1
Description
R
5
0
5
1
Rev. 1.1
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
R
4
0
4
1
P2SKIP[7:0]
R/W
Function
Write
R
3
0
3
1
R
2
0
2
1
0: P3.n Port pin is logic
LOW.
1: P3.n Port pin is logic
HIGH.
C8051F54x
R
1
0
1
1
Read
R/W
P3
0
0
0
1
167

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