MT48H8M32LFB5-10 IT Micron Technology Inc, MT48H8M32LFB5-10 IT Datasheet - Page 33

• Manufacturer Part Number: MT48H8M32LFB5-10 IT
• Description: IC SDRAM 256MBIT 100MHZ 90VFBGA
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M32LFB5-10 IT

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 90-VFBGA
• Organization: 8Mx32
• Density: 256Mb
• Address Bus: 14b
• Access Time (max): 17/8/7ns
• Maximum Clock Rate: 104MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 65mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 19: Random WRITE Cycles
Figure 20: WRITE to READ
PDF: 09005aef80d460f2/Source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. G 6/05
Note:
Note:
In addition, when truncating a WRITE burst, the DQM signal must be used to mask
input data for the clock edge prior to, and the clock edge coincident with, the PRE-
CHARGE command. An example is shown in Figure 21. Data n + 1 is either the last of a
burst of two or the last desired of a longer burst. Following the PRECHARGE command,
a subsequent command to the same bank cannot be issued until
In the case of a fixed-length burst being executed to completion, a PRECHARGE com-
mand issued at the optimum time (as described above) provides the same operation
that would result from the same fixed-length burst with auto precharge. The disadvan-
tage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length or full-page
bursts.
Each WRITE command may be to any bank. DQM is LOW.
The WRITE command may be to any bank, and the READ command may be to any bank.
DQM is LOW. CL = 2 for illustration.
COMMAND
ADDRESS
CLK
COMMAND
DQ
ADDRESS
CLK
DQ
WRITE
BANK,
COL n
D
T0
n
IN
33
BANK,
WRITE
COL n
D
T0
n
IN
n + 1
NOP
T1
D
IN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WRITE
BANK,
COL a
T1
D
a
IN
BANK,
COL b
READ
T2
WRITE
BANK,
COL x
D
T2
x
IN
T3
NOP
256Mb: x32 Mobile SDRAM
WRITE
BANK,
COL m
T3
D
m
IN
NOP
D
T4
DON’T CARE
OUT
b
©2003 Micron Technology, Inc. All rights reserved.
t
RP is met.
DON’T CARE
NOP
T5
b + 1
D
OUT
Operation