MT48H8M32LFB5-8 TR Micron Technology Inc, MT48H8M32LFB5-8 TR Datasheet - Page 39

IC SDRAM 256MBIT 125MHZ 90VFBGA

MT48H8M32LFB5-8 TR

Manufacturer Part Number
MT48H8M32LFB5-8 TR
Description
IC SDRAM 256MBIT 125MHZ 90VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48H8M32LFB5-8 TR

Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (8Mx32)
Speed
125MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1054-2
Figure 27: READ With Auto Precharge Interrupted by a READ
Figure 28: READ With Auto Precharge Interrupted by a WRITE
PDF: 09005aef80d460f2/Source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. G 6/05
Note:
Note:
Internal
States
Internal
States
COMMAND
COMMAND
DQM is LOW.
DQM is HIGH at T2 to prevent D
ADDRESS
ADDRESS
BANK m
BANK m
BANK n
BANK n
DQM
CLK
CLK
DQ
DQ
1
Active
Page
READ - AP
BANK n,
BANK n
Page Active
COL a
T0
NOP
T0
READ with Burst of 4
READ - AP
BANK n,
Page Active
Page Active
BANK n
COL a
T1
T1
NOP
CL = 3 (bank n)
READ with Burst of 4
39
CL = 3 (bank n)
OUT
T2
T2
NOP
NOP
-a +1 from contending with D
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BANK m,
READ - AP
T3
T3
BANK m
COL d
D
NOP
OUT
a
Interrupt Burst, Precharge
READ with Burst of 4
BANK m,
WRITE - AP
COL d
BANK m
T4
T4
CL = 3 (bank m)
D
NOP
256Mb: x32 Mobile SDRAM
d
IN
Interrupt Burst, Precharge
D
WRITE with Burst of 4
OUT
a
t
RP - BANK n
T5
T5
d + 1
NOP
NOP
D
IN
©2003 Micron Technology, Inc. All rights reserved.
D
a + 1
OUT
t
RP - BANK n
IN
-d at T4.
T6
T6
d + 2
NOP
NOP
D
IN
D
OUT
d
DON’T CARE
Operation
DON’T CARE
Idle
T7
T7
t WR - BANK m
d + 3
NOP
NOP
D
t RP - BANK m
IN
Precharge
Write-Back
D
d + 1
OUT
Idle

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