MC10XS4200FK Freescale Semiconductor, MC10XS4200FK Datasheet - Page 28

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MC10XS4200FK

Manufacturer Part Number
MC10XS4200FK
Description
Power Switch ICs - Power Distribution 24v 10MOHM DUAL HI-SIDE
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC10XS4200FK

Rohs
yes
On Resistance (max)
18 mOhms
Operating Supply Voltage
8 V to 36 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
PQFN-23
Minimum Operating Temperature
- 40 C

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FUNCTIONAL DEVICE OPERATION
OPERATION AND OPERATING MODES
SLEEP MODE
turned off to minimize current consumption.
Direct Input pins IN(x) remain Off longer than t
reset is active; RSTB = 0). This is expressed as follows:
Sleep mode is the default mode after the first application of
the supply voltage (V
(RSTB and the internal states IN_ON[0:1] are still at logic [0]).
All SPI register contents remain in their default state during
Sleep mode.
FAIL-SAFE MODE
Entering Fail-safe Mode
communication or after loss of optional SPI supply voltage
V
channels are only be controlled by the direct inputs (IN[0:1]).
All protective functions remain fully operational. Previously
latched faults are delatched and SPI register contents is reset
(except bits POR & PARALLEL). The SPI registers can not
28
10XS4200
DD
In Sleep mode, the channels and the SPI interface are
The device enters Sleep mode (wake-up = 0) when both
• V
• wake-up = 0 (wake-up = RSTB or IN_ON[0] or
• fail-safe = X, and
• fault = X
When employed, V
Fail-safe mode is entered either upon loss of SPI
Fail-safe
(VDD Out of
IN_ON[1]), and
PWR
(and V
(wake-up = 0)
Range). The FSOB pin will go low and the
DD
) are within the normal range, and
PWR
DD
(wake-up = 1) and
(fail-safe = 1)
and (fault = 0)
must be kept in the normal range.
), prior to any I/O communication
(fail-safe = 1) and
(wake-up = 1)
and (fault = 1)
(fail safe = 1) and
(wake-up = 1) and
(fault = 0)
(fail-safe = 0) and (wake-up = 1) and (fault = 0)
(fail-safe = 1) and (wake-up = 1) and (fault = 0)
(wake-up = 0)
Figure 11. Device Operating Modes
IN
sec. (when
Fault
Sleep
(wake-up = 1)
and (fault = 1)
(fail-safe = 0) and (wake-
up = 1) and (fault = 0)
be accessed. These conditions are also described by the
following expressions:
communication, which is detailed in the next section.
Watchdog on SPI Communication and Fail-safe Mode
upon a rising edge on the
monitors the state of the first bit (WDIN) of all received SPI
words. When the state of this bit is not alternated at least
once within a data stream of duration t
the device considers the SPI communication has been lost
and enters Fail-safe mode. This behavior can be disabled by
setting the bit WD_DIS = 1. The value of watchdog timeout is
derived from an internal oscillator.
Returning from Fail-safe to Normal mode
first a SPI data word with its WDIN bit = 1 (D15) must be
received by the device (regardless the register it is contained
in, and regardless of the values of the other bits in this
register). Next, a second data word must be received within
the timeout period (t
change any SPI register contents. Upon entering Normal
• V
• wake-up = 1, fault = 0, and
• fail-safe = 1 ((V
The second case corresponds to loss of SPI
When V
To exit Fail-safe mode and return to normal mode again,
or (t(SPI)> t
(fail-safe = 0) and
(wake-up = 1) and
(fault = 1)
PWR
(fail-safe = 0) and (wake-up = 1) and (fault = 0)
DD
is within the normal voltage range, and
is present, the SPI watchdog timer is started
(wake-up = 0)
WDTO
WDTO
DD
Analog Integrated Circuit Device Data
and WD_dis = 0).
Failure and V
RSTB
= 310 ms typ.), to be able to
Normal
pin. Thereafter, the device
Freescale Semiconductor
DD
WDTO
_FAIL_en=1 before)
= 310 ms typ.
,

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