C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 392

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C8051F966-A-GQ

Manufacturer Part Number
C8051F966-A-GQ
Description
8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F966-A-GQ

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F966-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F966-A-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F96x
SFR Definition 28.4. SMB0ADM: SMBus Slave Address Mask
SFR Page = 0x0; SFR Address = 0xF5
392
Name
Reset
Bit
7
Type
0
Bit
:
1
SLVM[6:0]
EHACK
Name
7
1
SMBus Slave Address Mask.
Defines which bits of register SMB0ADR are compared with an incoming address
byte, and which bits are ignored. Any bit set to 1 in SLVM[6:0] enables compari-
sons with the corresponding bit in SLV[6:0]. Bits set to 0 are ignored (can be either
0 or 1 in the incoming address).
Hardware Acknowledge Enable.
Enables hardware acknowledgement of slave address and received data bytes.
0: Firmware must manually acknowledge all incoming address and data bytes.
1: Automatic Slave Address Recognition and Hardware Acknowledge is Enabled.
6
1
5
1
SLVM[6:0]
R/W
Rev. 0.5
4
1
Function
3
1
2
1
1
1
EHACK
R/W
0
0

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