C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 251

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C8051F966-A-GQ

Manufacturer Part Number
C8051F966-A-GQ
Description
8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F966-A-GQ

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT

Available stocks

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Manufacturer
Quantity
Price
Part Number:
C8051F966-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F966-A-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
18.5.2. PSWE Maintenance
18.5.3. System Clock
Additional flash recommendations and example code can be found in “AN201: Writing to Flash from Firm-
ware," available from the Silicon Laboratories website.
1. Reduce the number of places in code where the PSWE bit (b0 in PSCTL) is set to a 1. There should
2. Minimize the number of variable accesses while PSWE is set to a 1. Handle pointer address updates
3. Disable interrupts prior to setting PSWE to a 1 and leave them disabled until after PSWE has been
4. Make certain that the flash write and erase pointer variables are not located in XRAM. See your
5. Add address bounds checking to the routines that write or erase flash memory to ensure that a
1. If operating from an external crystal, be advised that crystal performance is susceptible to electrical
2. If operating from the external oscillator, switch to the internal oscillator during flash write or erase
be exactly one routine in code that sets PSWE to a 1 to write flash bytes and one routine in code that
sets both PSWE and PSEE both to a 1 to erase flash pages.
and loop maintenance outside the "PSWE = 1;... PSWE = 0;" area. Code examples showing this can
be found in “AN201: Writing to Flash from Firmware," available from the Silicon Laboratories web
site.
reset to 0. Any interrupts posted during the flash write or erase operation will be serviced in priority
order after the flash operation has been completed and interrupts have been re-enabled by software.
compiler documentation for instructions regarding how to explicitly locate variables in different
memory areas.
routine called with an illegal address does not result in modification of the flash.
interference and is sensitive to layout and to changes in temperature. If the system is operating in an
electrically noisy environment, use the internal oscillator or use an external CMOS clock.
operations. The external oscillator can continue to run, and the CPU can switch back to the external
oscillator after the flash operation has completed.
Rev. 0.5
C8051F96x
251

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