MAX11200EEE+T Maxim Integrated, MAX11200EEE+T Datasheet - Page 23

• Manufacturer Part Number: MAX11200EEE+T
• Description: Analog to Digital Converters - ADC 24-Bit Delta-Sigma
• Manufacturer: Maxim Integrated

Specifications of MAX11200EEE+T

• Rohs: yes
• Number Of Channels: 1
• Architecture: Sigma-Delta
• Resolution: 24 bit
• Input Type: Single-Ended
• Interface Type: SPI
• Operating Supply Voltage: 1.7 V to 3.6 V, 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QSOP-16
• Maximum Power Dissipation: 667 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 3.6 V

The system gain calibration register is a 24-bit read/write register. The data written/read to/from this register is clocked
in/out MSB first. This register holds the system gain calibration value. The format is always in two’s complement binary
format. A write to the system-calibration register is allowed. The written value remains valid until it is either rewritten or
until an on-demand system-calibration operation is performed, which overwrites the user-supplied value.
The system gain calibration value is used to scale the offset corrected conversion result, provided the NOSYSG bit
in the CTRL3 register is set to 0. The system gain calibration value scales the offset-corrected result by up to 2x or
corrects a gain error of approximately -50%. The amount of positive gain error that can be corrected is determined by
modulator overload characteristics, which can be as much as +25%. The gain is corrected to within 2 LSB.
Table 18. SGC Register (Read/Write)
The self-calibration offset register is a 24-bit read/write register. The data written/read to/from this register is clocked
in/out MSB first. This register holds the self-calibration offset value. The format is always in two’s complement binary
format. A write to the self-calibration offset register is allowed. The written value remains valid until it is either rewritten
or until an on-demand self-calibration operation is performed, which overwrites the user-supplied value.
The self-calibration offset value is subtracted from each conversion result provided the NOSCO bit in the CTRL3 reg-
ister is set to 0. The self-calibration offset value is subtracted from the conversion result before the self-calibration gain
correction and before the system offset and gain correction. The self-calibration offset value is also applied prior to the
2x scale factor associated with unipolar mode.
Table 19. SCOC Register (Read/Write)
Maxim Integrated
BIT
DEFAULT
BIT
DEFAULT
BIT
DEFAULT
BIT
DEFAULT
BIT
DEFAULT
BIT
DEFAULT
24-Bit, Single-Channel, Ultra-Low-Power,
B23
B15
B7
0
0
0
B23
B15
B7
0
0
0
B22
B14
B6
0
0
0
B22
B14
B6
0
0
0
B13
B21
B5
0
0
0
Delta-Sigma ADCs with GPIO
B21
B13
B5
0
0
0
B20
B12
B4
0
0
0
B20
B12
B4
0
0
0
MAX11200/MAX11210
B19
B11
B3
0
0
0
B19
B11
B3
0
0
0
SGC: System Gain Calibration Register
SCOC: Self-Calibration Offset Register
B18
B10
B2
0
0
B18
B10
0
B2
0
0
0
B17
B9
B1
B17
B9
B1
0
0
0
0
0
0
B16
B16
B8
B0
B8
B0
0
0
0
0
0
0
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