LP1072 FREESCALE [Freescale Semiconductor, Inc], LP1072 Datasheet - Page 23

• Manufacturer Part Number: LP1072
• Description: 802.11a/b/g Baseband System Solution
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

M SD_DAT_
A
B RSSIADC
C
D
E
G
H CF_D_3
K
N SD_CMD SD_CLK
P CF_D_14 CF_D_15 VDD_IO
R
F
J
L CF_D_7
GPIO_0
DVDD_
AVDD_
AVSS_
MODE
MODE
CLKIN
CORE
CHIP_
CHIP_
VDD_
ARM_
PLL
PLL
PLL
6.3
NC
Freescale Semiconductor
_1
_1
_3
IN
1
0
SD_DAT_
CF_D_11 CF_D_
CF_CE1_
PVDD3P
CF_D_0
CF_D_5
CF_D_4 CF_D_6 SD_DAT
CF_D_9 CF_D_
DVSS_
DGND
CHIP_
MODE
DVDD
PLL
NC
_1
_0
N
2
2
Footprint
POWER
CF_D_2 CF_D_1
VDD_IO
GPIO_1
GPIO_2
DBGEN
MODE_
TAVDD
CHIP_
ARM_
ARM_
ARM_
AVDD PVDD3P
IBIAS AUXADC
NC
NC
_1
10
13
_2
3
2
CF_D_12
AUXDAC
PVSS3P
CF_CE2
SD_DAT
CF_D_8
GPIO_3
GPIO_4
CF_A_0
AVDD_
TCXO
ARM_
ARM_
EXT_
BIAS
IN_2
OUT
_N
_2
_1
_3
_1
4
AUXADC
AUXADC
TAVSSP
CF_A_1 VDD_IO_3
GPIO_5
GPIO_7
VREFN
AVSS_
OWER
AGND
TCXO
ARM_
ARM_
ARM_
GPIO
VBG
IN_0
IN_1
GND
GND
GND
GND
_6
5
QADCINN
QADCINP
CF_A_2
CF_A_3
_0_DO
AGND
ARM_
UART
GND
NC
NC
6
LP1072 Advance Information, Rev. 0.3
AVDDIQADC AGNDIQ
PVSS3P_2
EEPROM_
DAT_GPIO
CF_A_5
CF_A_4
VREFP
ARM_
ARM_
UART
_0_DI
GND
NC
NC
7
PRELIMINARY
EEPROM
IADCINN AVDDIQDAC
IADCINP IDACOUTP QDACOUTP
AGNDIQ
CORE_2
CLOCK
RESET
DAC_1
_CLK_
JTAG_
JTAG_
ARM_
VDD_
GPIO
GND
ADC
NC
8
IDACOUTN
ANALOG
CF_A_7
CF_A_8
CF_A_6
VOCM
_LDO
GND
GND
RF_
_1
9
QDACOUTN
VDD_CORE
FAST_CLK
JTAG_DO
_POWER
BYPASS
JTAG_DI
CF_A_9
PLL_
GND
GND
10
_3
VDD_IO_
SERVED
BYPASS
BYPASS
BYPASS
RF_RXE
TCXO_
TCXO_
MODE
JTAG_
_CLK
_CLK
PLL_
GND
GND
GND
GND
GND
GND
GND
GND
RE-
11
N
4
CF_CD2_
VDD_IO_
SERVED
SERVED
SERVED
INPACK_
RF_SIF_
CF_OE_
SPARE1
IORD_N
RF_EN
2_DIN
RXHP
RF_
CF_
RF_
CF_
RE-
RE-
RE-
NC
NC
NC
12
N
N
N
6
Pinout and Footprint
ANTENNA
RESET_N
RF_VGA_
RF_VGA_
RF_PAEN
CF_CD1_
CF_A_10 VDD_IO_
SERVED
IOWR_N
BYPASS
SPARE2
XTAL_
TXEN
_CLK
_SEL
RF_
RF_
RF_
CF_
RE-
NC
NC
NC
13
0
3
N
2
CF_IREQ
SERVED
SERVED
SERVED
CF_REG
STSCHG
DETECT
RF_SIF_
RF_VGA
RF_VGA
1_CS_N
LOCK_
PAEN1
XTAL_
XOUT
32K_
RF_
CF_
RF_
RE-
RE-
RE-
NC
NC
_N
_N
_N
14
_2
_6
5
EMBEDDED
VDD_CORE
XTAL_32K_
_RESET_N
RF_SIF_0_
RF_VGA_1
RF_VGA_4
RF_VGA_5
ANTENNA
CF_WE_N
SERVED
SERVED
CORE_4
BYPASS
_SEL_N
RESET
23
XTAL_
SCLK
VDD_
RF_
CF_
XIN
RE-
RE-
NC
15
_5