LP1072 FREESCALE [Freescale Semiconductor, Inc], LP1072 Datasheet - Page 13

• Manufacturer Part Number: LP1072
• Description: 802.11a/b/g Baseband System Solution
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale Semiconductor
Device to SDIO Host Interrupt Enable 0 (0x0017)
Device to SDIO Host Interrupt Enable 1 (0x0018)
SDIO Host Mailbox Semaphore 0 Register (offset 0x001C)
SDIO Host Mailbox Semaphore 1 Register (offset 0x001D)
Bit
7:0
2:0
7:3
1:0
7:2
1:0
7:2
Arm_to_sdio_inte_en[7:0]
Arm_to_sdio_inte_en[10:8]
Sdio_mbxp_0_sema
Reserved
Sdio_mbxp_1_sema
Reserved
Name
-⎯
Table 8. SDIO Function 1 Registers (continued)
Individual bit enables for each of the device to host
interrupt source bits. Setting the corresponding bit
to a “1” enables the interrupt; “0” disables the
interrupt. The SDIO Host can disable all interrupts
by disabling the main SDIO host interrupt in the
CCCR register.
Individual bit enables for each of the device to host
interrupt source bits. Setting the corresponding bit
to a “1” enables the interrupt; “0” disables the
interrupt. The SDIO Host can disable all interrupts
by disabling the main SDIO host interrupt in the
CCCR register.
Bit 0 is enable for semaphore 0 granted; bit 1 is
semaphore 1; and bit 2 is semaphore 2.
Reserved
2 bit semaphore register to control whether the
host or the device has access to the shared
mailbox ram 0. The host should write a “01” to this
register to request the shared ram 0. After writing
“01” the host should read this register. If the value
is “01” then the host owns access to the mailbox.
If the value read is “11” then the device owns
access to the mailbox. When the host is done
utilizing the mailbox then it should release
ownership of the mailbox by writing “00” to this
register.
2 bit semaphore register to control whether the
host or the device has access to the shared
mailbox ram 1. The host should write a “01” to this
register to request the shared ram 1. After writing
“01” the host should read this register. If the value
is “01” then the host owns access to the mailbox.
If the value read is “11” then the device owns
access to the mailbox. When the host is done
utilizing the mailbox then it should release
ownership of the mailbox by writing “00” to this
register.
LP1072 Advance Information, Rev. 0.3
PRELIMINARY
Description
-⎯
-⎯
Access
ARM
RW
RW
-⎯
-⎯
-⎯
-⎯
-⎯
Access
HOST
RW
RW
RW
RW
-⎯
-⎯
-⎯
LP1072 Interfaces
Reset
-⎯
-⎯
-⎯
0’s
0’s
0’s
0’s
13