LP1072 FREESCALE [Freescale Semiconductor, Inc], LP1072 Datasheet - Page 21

• Manufacturer Part Number: LP1072
• Description: 802.11a/b/g Baseband System Solution
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale Semiconductor
IADCINN
IADCINP
QADCINN
QADCINP
RSSIADCIN
VOCM
AUXDACOUT
IDACOUTP
IDACOUTN
QDACOUTP
QDACOUTN
EXT_BIAS
TCXO Squarer
AVDD_TCXO
AVSS_TCXO
CLKIN
RF Interface Signals
RF_ANALOG_LDO
RF_EN
RF_RXEN
RF_TXEN
RF_PAEN1
RF_PAEN2
RF_SPARE1
RF_SPARE2
RF_VGA6
RF_VGA5
RF_VGA4
RF_VGA3
RF_VGA2
RF_VGA1
RF_VGA0
RF_RXHP
RF_ANTENNA_SEL
RF_ANTENNA_SEL_N
Pad Name
Pad Type
pdb04dgz
pdb04dgz
pdb04dgz
pdb04dgz
pdb04dgz
pdb04dgz
pdb04dgz
pdb04dgz
pdb04dgz
pdb04dgz
pdb04dgz
pdo02cdg
pdo02cdg
pdo02cdg
pdo02cdg
pdo02cdg
pdo02cdg
pdo02cdg
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pdiana2p
pvdd3p
pvss3p
Table 9. Pin Description (continued)
LP1072 Advance Information, Rev. 0.3
Direction
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Bi-dir
Bi-dir
Bi-dir
Bi-dir
Bi-dir
Bi-dir
Bi-dir
Bi-dir
Bi-dir
Bi-dir
Bi-dir
Input
Input
Input
Input
Input
Input
Input
Input
N/A
N/A
PRELIMINARY
Negative input of I-ADC
Positive input of I-ADC
Negative input of Q-ADC
Positive input of Q-ADC
RSSI ADC input
Input pin for definition of IQDAC output common -mode level
Auxiliary DAC output
Positive output of I-DAC
Negative output of I-DAC
Positive output of Q-DAC
Negative output of Q-DAC
External Bias for test
Analog 3.3 volt
Analog ground
TCXO reference clock input
LDO enable for RF VCO power. Driven by PHY controller.
RF enable. Driven by PHY controller.
RF Rx enable. Driven by PHY controller.
RF Tx enable. Driven by PHY controller.
RF PA enable 1. Driven by PHY controller.
RF PA enable 2. Driven by PHY controller.
RF spare 1 (not used). Driven by PHY controller.
RF spare 2 (not used). Driven by PHY controller.
RF VGA setting. Driven by UWA.
RF VGA setting. Driven by UWA.
RF VGA setting. Driven by UWA.
RF VGA setting. Driven by UWA.
RF VGA setting. Driven by UWA.
RF VGA setting. Driven by UWA.
RF VGA setting. Driven by UWA.
RF Rx highpass filter setting. Driven by UWA.
RF antenna select. Driven by ARM.
RF antenna select. Driven by ARM.
Description
Pinout and Footprint
M13
M14
M15
R12
N13
G13
N15
H12
H13
B10
A10
P11
P14
K13
Pin
L12
L14
L15
J13
J15
C6
D9
C4
C9
D4
G5
M9
A8
B8
B6
B1
B9
F4
F1
21