ZL50011/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50011/GDC Datasheet - Page 72

• Manufacturer Part Number: ZL50011/GDC
• Description: Flexible 512 Channel DX with on-chip DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

AC Electrical Characteristics - Input and Output Frame Boundary Alignment
1
2
Input and Output Frame Offset in
DPLL Master Mode
Input and Output Frame Offset in
DPLL Bypass Mode
CKo2 or FPo1
(16.384MHz)
CKo1 or CKo0
FPo2 or FPo1
Input Frame Boundary
FPo1 or FPo0
(4.096MHz)
(8.192MHz)
(16.384MHz)
(32.768MHz)
(4.096MHz)
(8.192MHz)
CKo2
CKo0
CKi
CKi
FPo2
FPo0
FPi
CKi
FPi
FPi
Characteristic
Figure 39 - Input and Output Frame Boundary Offset
t
FBOS
Zarlink Semiconductor Inc.
t FBOS
t FBOS
Sym.
Output Frame Boundary
ZL50011
72
Min.
-20
1
Typ.
Max.
18
0
Units
ns
ns
Input reference is internal
8 kHz derived from FPi
and CKi.
Measured when there is
no jitter on the CKi and
FPi inputs.
Measured when there is
no jitter on the CKi and
FPi inputs.
Notes
Data Sheet