ZL50011/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50011/GDC Datasheet - Page 19

• Manufacturer Part Number: ZL50011/GDC
• Description: Flexible 512 Channel DX with on-chip DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

2.2
The device has 16 ST-BUS serial data outputs. Any of the 16 outputs can be programmed to deliver different data
rates at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps.
2.2.1
Any ST-BUS output can be programmed to deliver the data at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps mode using
Bit 0 to 2 in the Stream Output Control Register, SOCR0 to SOCR15 as shown in Table 28 on page 60 and Table 29
on page 61.
2.2.2
The device offers 3 frame pulse outputs, FPo0, FPo1 and FPo2. All output frame pulses are 8 kHz output signals.
By default, the output frame boundary is defined by the falling edge of the CKo0, CKo1 or CKo2 output clocks while
the FPo0, FPo1 or FPo2 output frame pulse goes low respectively.
In addition to the default settings, users can also select different output frame pulse low cycles and output clock
frequencies by programming the CKFP0, CKFP1 and CKFP2 bits in the Control Register. See Table 2, Table 3 and
Table 4 for the bit usage in the Control Register:
ST-BUS Output Data Rate and Output Timing
ST-BUS Output Operation Mode
Frame Pulse Output and Clock Output Timing
CKFP0
CKFP1
CKFP2
0
1
0
1
0
1
Table 2 - FPo0 and CKo0 Output Programming
Table 3 - FPo1 and CKo1 Output Programming
Table 4 - FPo2 and CKo2 Output Programming
Low Cycle
244 ns
122 ns
122 ns
FPo0
FPo1
61 ns
FPo2
30 ns
61 ns
Zarlink Semiconductor Inc.
ZL50011
19
16.384 MHz
32.768 MHz
16.384 MHz
4.096 MHz
8.192 MHz
8.192 MHz
CKo0
CKo1
CKo2
Data Sheet