ZL50011/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50011/GDC Datasheet - Page 24

• Manufacturer Part Number: ZL50011/GDC
• Description: Flexible 512 Channel DX with on-chip DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

2.3.3
In addition to the input bit delay feature, the device allows users to change the sampling point of the input bit. By
default, the sampling point is at 3/4 bit. Users can change the sampling point to 1/4, 1/2, 3/4 or 4/4 bit position by
programming Bit 3 and 4 of the Stream Input Control Registers (SICR).
2.3.4
This feature allows each output stream to have a different output frame boundary with respect to the output frame
boundary defined by the output frame pulse (FPo0, FPo1 and FPo2) and the output clock (CKo0, CKo1 or CKo2).
By default, all output streams have zero channel delay such that Ch 0 is the first channel that appears after the
output frame boundary as shown in Figure 17. Different output channel delay can be set by programming Bit 5 to 11
in the Stream Output Offset Registers (SOOR). The output channel delay can vary from 0 to 31, 0 to 63 and 0 to
127 for the 2.048 Mbps, 4.096 Mbps and 8.192 Mbps modes respectively.
Channel Delay = 2
Channel Delay = 0
Channel Delay = 1
Note: X = 0 to 15
Note: Last Channel = 31, 63, 127 for 2.048 Mbps, 4.096 Mbps and 8.192 Mbps mode respectively
Note: X = 0 to 15
Output Frame Boundary
Fractional Input Bit Delay Programming
Output Channel Delay Programming
Bit Delay = 1
Bit Delay = 0
(Default)
(Default)
SToX
SToX
SToX
STiX
FPo
STiX
FPi
Note: Last Channel = 31, 63, 127 for 2.048 Mbps, 4.096 Mbps and 8.192 Mbps mode respectively
3
3
3
Input Frame Boundary
2
2
2
3
4
1 0
1 0
1 0
Last Channel
Last Channel
7
7
7
2
3
6
6
6
Last Channel -1
Figure 17 - Output Channel Delay Timing Diagram
Last Channel
5
5
5
Ch 0
Delay = 1
1
2
4
4
4
Figure 16 - Input Bit Delay Timing Diagram
3
3
3
0
1
2
2
2
1 0
1 0
1 0
Delay = 2
0
7
7
7
7
Zarlink Semiconductor Inc.
6
6
6
Last Channel
6
7
5
5
5
Bit Delay = 1
Ch 1
Ch 0
ZL50011
4
4
4
3
3
3
5
6
24
2
2
2
Ch0
1 0
1 0
1 0
4
5
7
Ch0
3
4
6
5
Ch0
4
2
3
3
Last Channel -1
6
Last Channel -2
6
2
1
2
5
5
1 0
4
4
3
3
0
1
2
2
1 0
1 0
7
0
7
7
7
Last Channel -1
6
6
6
Last Channel -2
6
7
Last Channel
5
5
5
4
4
4
Ch1
5
6
3
3
3
Ch1
2
2
2
4
1 0
1 0
1 0
5
Data Sheet
7 6
7 6
7 6