PIC24FJ128GA MICROCHIP [Microchip Technology], PIC24FJ128GA Datasheet - Page 96
PIC24FJ128GA
Manufacturer Part Number
PIC24FJ128GA
Description
General Purpose, 16-Bit Flash Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC24FJ128GA.pdf
(232 pages)
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PIC24FJ128GA FAMILY
REGISTER 7-2:
DS39747C-page 94
Upper Byte:
bit 15
bit 15
bit 14-12 DOZE2:DOZE0: CPU Peripheral Clock Ratio Select bits
bit 11
bit 10-8
bit 7-0
R/W-0
ROI
ROI: Recover on Interrupt bit
1 = Interrupts clear the DOZEN bit and reset the CPU peripheral clock ratio to 1:1
0 = Interrupts have no effect on the DOZEN bit
111 = 1:128
110 = 1:64
101 = 1:32
100 = 1:16
011 = 1:8
010 = 1:4
001 = 1:2
000 = 1:1
DOZEN: DOZE Enable bit
1 = DOZE2:DOZE0 bits specify the CPU peripheral clock ratio
0 = CPU peripheral clock ratio set to 1:1
RCDIV2:RCDIV0: FRC Postscaler Select bits
111 = 31.25 kHz (divide by 256)
110 = 125 kHz (divide by 64)
101 = 250 kHz (divide by 32)
100 = 500 kHz (divide by 16)
011 = 1 MHz (divide by 8)
010 = 2 MHz (divide by 4)
001 = 4 MHz (divide by 2)
000 = 8 MHz (divide by 1)
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
Note 1: This bit is automatically cleared when the ROI bit is set and an interrupt occurs.
DOZE2
R/W-0
Lower Byte:
bit 7
U-0
CLKDIV: CLOCK DIVIDER REGISTER
—
DOZE1
R/W-0
U-0
—
(1)
DOZE0
R/W-0
W = Writable bit
‘1’ = Bit is set
U-0
—
Preliminary
DOZEN
R/W-0
(1)
U-0
—
RCDIV2
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
RCDIV1
R/W-1
U-0
—
© 2006 Microchip Technology Inc.
RCDIV0
R/W-1
x = Bit is unknown
bit 8
U-0
—
U-0
—
bit 0