PIC24FJ128GA MICROCHIP [Microchip Technology], PIC24FJ128GA Datasheet - Page 108

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PIC24FJ128GA

Manufacturer Part Number
PIC24FJ128GA
Description
General Purpose, 16-Bit Flash Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC24FJ128GA FAMILY
REGISTER 11-1:
DS39747C-page 106
Upper Byte:
bit 15
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3
bit 2
bit 1
bit 0
R/W-0
TON
TON: Timerx On bit
When TxCON<3> = 1:
1 = Starts 32-bit Timerx/y
0 = Stops 32-bit Timerx/y
When TxCON<3> = 0:
1 = Starts 16-bit Timerx
0 = Stops 16-bit Timerx
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timerx Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS1:TCKPS0: Timer2 Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
T32: 32-bit Timer Mode Select bit
1 = Timerx and Timery form a single 32-bit timer
0 = Timerx and Timery act as two 16-bit timers
Unimplemented: Read as ‘0’
TCS: Timerx Clock Source Select bit
1 = External clock from pin TxCK (on the rising edge)
0 = Internal clock (F
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value at POR
Note:
U-0
Lower Byte:
bit 7
U-0
TxCON: TIMER2 AND TIMER4 CONTROL REGISTER
In 32-bit mode, T3CON control bits do not affect 32-bit timer operation.
R/W-0
TSIDL
OSC
TGATE
R/W-0
/2)
U-0
W = Writable bit
‘1’ = Bit is set
TCKPS1
R/W-0
Preliminary
U-0
TCKPS0
R/W-0
U-0
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
R/W-0
T32
U-0
U-0
© 2006 Microchip Technology Inc.
U-0
x = Bit is unknown
bit 8
R/W-0
TCS
U-0
bit 0

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