PIC24FJ128GA MICROCHIP [Microchip Technology], PIC24FJ128GA Datasheet - Page 153

• Manufacturer Part Number: PIC24FJ128GA
• Description: General Purpose, 16-Bit Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

18.1.2
REGISTER 18-1:
© 2006 Microchip Technology Inc.
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
Upper Byte:
bit 15
RTCEN
R/W-0
(2)
RTCEN: RTCC Enable bit
1 = RTCC module is enabled
0 = RTCC module is disabled
Unimplemented: Read as ‘0’
RTCWREN: RTCC Value Registers Write Enable bit
1 = RTCVALH and RTCVALL registers can be written to by the user
0 = RTCVALH and RTCVALL registers are locked out from being written to by the user
RTCSYNC: RTCC Value Registers Read Synchronization bit
1 = RTCVALH, RTCVALL and ALCFGRPT registers can change while reading due to a rollover ripple
0 = RTCVALH, RTCVALL or ALCFGRPT registers can be read without concern over a rollover ripple
HALFSEC: Half-Second Status bit
1 = Second half period of a second
0 = First half period of a second
RTCOE: RTCC Output Enable bit
1 = RTCC output enabled
0 = RTCC output disabled
Legend:
R = Readable bit
-n = Value at POR
RTCC CONTROL REGISTERS
Note:
Note 1: The RCFGCAL register is only affected by a POR.
resulting in an invalid data read. If the register is read twice and results in the same data, the data can
be assumed to be valid.
U-0
—
Lower Byte:
bit 7
2: A write to the RTCEN bit is only allowed when RTCWREN = 1.
R/W-0
CAL7
RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER
This bit is read-only. It is cleared to ‘0’ on a write to the lower half of the MINSEC register.
RTCWREN RTCSYNC HALFSEC
R/W-0
R/W-0
CAL6
(2)
‘1’ = Bit is set
W = Writable bit
R-0
R/W-0
CAL5
Preliminary
R-0
PIC24FJ128GA FAMILY
R/W-0
CAL4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RTCOE
R/W-0
R/W-0
CAL3
RTCPTR1 RTCPTR0
R/W-0
R/W-0
CAL2
R/W-0
x = Bit is unknown
bit 8
R/W-0
CAL1
DS39747C-page 151
(1)
R/W-0
CAL0
bit 0