PIC24FJ128GA MICROCHIP [Microchip Technology], PIC24FJ128GA Datasheet - Page 135

• Manufacturer Part Number: PIC24FJ128GA
• Description: General Purpose, 16-Bit Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

16.2
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16.3
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16.4
The following sequence will send a message frame
header made up of a Break, followed by an auto-baud
Sync byte.
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© 2006 Microchip Technology Inc.
Set up the UART:
a)
b)
c)
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write data byte to lower byte of TXxREG word.
The value will be immediately transferred to the
Transmit Shift Register (TSR), and the serial bit
stream will start shifting out with next rising edge
of the baud clock.
Alternately, the data byte may be transferred
while UTXEN = 0, and then the user may set
UTXEN. This will cause the serial bit stream to
begin immediately because the baud clock will
start from a cleared state.
A transmit interrupt will be generated as per
interrupt control bit, UTXISELx.
Set up the UART (as described in Section 16.2
“Transmitting in 8-Bit Data Mode”).
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write TXxREG as a 16-bit value only.
A word write to TXxREG triggers the transfer of
the 9-bit data to the TSR. Serial bit stream will
start shifting out with the first rising edge of the
baud clock.
A transmit interrupt will be generated as per the
setting of control bit, UTXISELx.
Configure the UART for the desired mode.
Set UTXEN and UTXBRK – sets up the Break
character,
Load the TXxREG with a dummy character to
initiate transmission (value is ignored).
Write ‘55h’ to TXxREG – loads Sync character
into the transmit FIFO.
After the Break has been sent, the UTXBRK bit
is reset by hardware. The Sync character now
transmits.
Transmitting in 8-Bit Data Mode
Write appropriate values for data, parity and
Stop bits.
Write appropriate baud rate value to the
BRGx register.
Set up transmit and receive interrupt enable
and priority bits.
Transmitting in 9-Bit Data Mode
Break and Sync Transmit
Sequence
Preliminary
PIC24FJ128GA FAMILY
16.5
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The act of reading the RXxREG character will move the
next character to the top of the receive FIFO, including
a new set of PERR and FERR values.
16.6
UARTx Clear to Send (UxCTS) and Request to Send
(UxRTS) are the two hardware controlled pins that are
associated with the UART module. These two pins
allow the UART to operate in Simplex and Flow Control
mode. They are implemented to control the transmis-
sion and reception between the Data Terminal
Equipment (DTE). The UEN<1:0> bits in the UxMODE
register configure these pins.
16.7
The UART module provides two types of infrared UART
support: one is the IrDA clock output to support exter-
nal IrDA encoder and decoder device (legacy module
support) and the other is the full implementation of the
IrDA encoder and decoder.
16.8
To support external IrDA encoder and decoder devices,
the BCLKx pin (same as the UxRTS pin) can be
configured to generate the 16x baud clock. With
UEN<1:0> = 11, the BCLKx pin will output the 16x
baud clock if the UART module is enabled. It can be
used to support the IrDA codec chip.
16.9
The UART has full implementation of the IrDA encoder
and decoder as part of the UART module. The built-in
IrDA encoder and decoder functionality is enabled
using the IREN bit UxMODE<12>. When enabled
(IREN = 1), the receive pin (UxRX) acts as the input
from the infrared receiver. The transmit pin (UxTX) acts
as the output to the infrared transmitter.
Set up the UART (as described in Section 16.2
“Transmitting in 8-Bit Data Mode”).
Enable the UART.
A receive interrupt will be generated when one
or more data characters have been received as
per interrupt control bit, URXISELx.
Read the OERR bit to determine if an overrun
error has occurred. The OERR bit must be reset
in software.
Read RXxREG.
Receiving in 8-Bit or 9-Bit Data
Mode
Operation of UxCTS and UxRTS
Control Pins
Infrared Support
External IrDA Support – IrDA
Clock Output
Built-in IrDA Encoder and Decoder
DS39747C-page 133