PIC18F2423 MICROCHIP [Microchip Technology], PIC18F2423 Datasheet - Page 152
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PIC18F2423
Manufacturer Part Number
PIC18F2423
Description
28/40/44-Pin, Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F2423.pdf
(392 pages)
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16.4.2
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR1L:CCP1CON<5:4>. The PWM duty cycle is
calculated by the following equation.
EQUATION 16-2:
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty cycle value is not copied into
CCPR1H until a match between PR2 and TMR2 occurs
(i.e., the period is complete). In PWM mode, CCPR1H
is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM opera-
tion. When the CCPR1H and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or two bits
of the TMR2 prescaler, the CCP1 pin is cleared. The
maximum PWM resolution (bits) for a given PWM
frequency is given by the following equation.
TABLE 16-2:
DS39755B-page 150
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
PWM Duty Cycle = (CCPR1L:CCP1CON<5:4>) •
PWM Frequency
PWM DUTY CYCLE
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
T
OSC
• (TMR2 Prescale Value)
2.44 kHz
FFh
16
10
9.77 kHz
Preliminary
FFh
10
4
39.06 kHz
EQUATION 16-3:
16.4.3
The P1M1:P1M0 bits in the CCP1CON register allow
one of four configurations:
• Single Output
• Half-Bridge Output
• Full-Bridge Output, Forward mode
• Full-Bridge Output, Reverse mode
The Single Output mode is the standard PWM mode
discussed in Section 16.4 “Enhanced PWM Mode”.
The Half-Bridge and Full-Bridge Output modes are
covered in detail in the sections that follow.
PWM Resolution (max) =
Note:
FFh
10
1
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
PWM OUTPUT CONFIGURATIONS
156.25 kHz
3Fh
1
8
log
© 2007 Microchip Technology Inc.
⎛
⎜
⎝
F
PWM
312.50 kHz
* TMR2 Prescale Value
1Fh
1
7
log(2)
F
OSC
416.67 kHz
6.58
17h
1
⎝
⎜
⎛
bits
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