KSZ8895MQ_12 MICREL [Micrel Semiconductor], KSZ8895MQ_12 Datasheet - Page 44

• Manufacturer Part Number: KSZ8895MQ_12
• Description: Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII interface
• Manufacturer: MICREL [Micrel Semiconductor]

Micrel, Inc.
Tail Tagging Mode
The Tail Tag is only seen and used by the Port 5 interface, which should be connected to a processor by SW5-MII
interface. The one byte tail tagging is used to indicate the source/destination port in Port 5. Only bit [3-0] are used for
the destination in the tail tagging byte. Other bits are not used. The Tail Tag feature is enabled by setting register 12
bit 1.
March 2012
Ingress to Port 5 (Host --> KSZ8895MQ/RQ/FMQ)
Bit [3:0]
0,0,0,0
0,0,0,1
0,0,1,0
0,1,0,0
1,0,0,0
1,1,1,1
Bit[7:4]
0,0,0,0
0,0,0,1
0,0,1,0
0,0,1,1
x, 1,x,x
1, x,x,x
Egress from Port 5 (KSZ8895MQ/RQ/FMQ --> Host)
Bit [1:0]
0,0
0,1
1,0
1,1
Figure 7. Tail Tag Frame Format
Destination
Normal (Address Look up for destination)
Port 1 (direct forward to Port1)
Port 2 (direct forward to Port2)
Port 3 (direct forward to Port3)
Port 4 (direct forward to Port4)
Port 1, 2,3 and 4 (direct forward to Port 1,2,3,4,)
Queue 0 is used at destination port
Queue 1 is used at destination port
Queue 2 is used at destination port
Queue 3 is used at destination port
Whatever send packets to specified port in bit[3:0]
Bit[6:0] will be ignored
Source
Port 1 (packets from Port 1)
Port 2 (packets from Port 2)
Port 3 (packets from Port 3)
Port 4 (packets from Port 4)
Table 7. Tail Tag Rules
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KSZ8895MQ/RQ/FMQ
M9999-032612-1.5