KSZ8895MQ_12 MICREL [Micrel Semiconductor], KSZ8895MQ_12 Datasheet - Page 29

• Manufacturer Part Number: KSZ8895MQ_12
• Description: Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII interface
• Manufacturer: MICREL [Micrel Semiconductor]

Micrel, Inc.
On-chip Termination Resistors
The KSZ8895MQ/RQ/FMQ reduces the board cost and simplifies the board layout by using on-chip termination
resistors for all ports and RX/TX differential pairs without the external termination resistors. The combination of the
on-chip termination and internal biasing will save about 500 to 1000mw in power consumption as compared to using
external biasing and termination resistors, and the transformer will not consume power any more. The center tap of
the transformer does not need to be tied to the analog power and does not tie the center taps together between RX
and TX pairs for its application.
Internal 1.2V LDO Controller
The KSZ8895MQ/RQ/FMQ reduces board cost and simplifies board layout by integrating an internal 1.2V LDO
controller to drive a low cost MOSFET to supply the 1.2V core power voltage for a single 3.3V power supply solution.
The internal 1.2V LDO controller can be disabled by pin 126 IN_PWR_SEL pull-down in order to use an external
1.2V LDO.
Functional Overview: Power Management
The KSZ8895MQ/RQ/FMQ supports a full chip hardware power down mode. When the PWRDN pin 47 is internally
activated low (pin PWRDN = 0), the entire chip is powered down. If this pin is de-asserted, the chip will be reset
internally.
The KSZ8895MQ/RQ/FMQ can also use multiple power levels of 3.3V, 2.5V or 1.8V for VDDIO to support different
I/O voltage.
The KSZ8895MQ/RQ/FMQ supports enhanced power management in a low power state, with energy detection to
ensure low power dissipation during device idle periods. There are five operation modes under the power
management function which are controlled by the Register 14 bit[4:3] and the Port Register Control 13 bit 3 as shown
below:
Register 14 bit[4:3] = 00 Normal Operation Mode
Register 14 bit[4:3] = 01 Energy Detect Mode
Register 14 bit[4:3] = 10 Soft Power Down Mode
Register 14 bit[4:3] = 11 Power Saving Mode
The Port Register 29, 45, 61, 77, 93 Control 13 bit 3 = 1 are for the Port Based Power-Down Mode.
Table 2 indicates all internal function blocks’ status under four different power management operation modes.
Normal Operation Mode
This is the default setting bit[4:3] = 00 in register 14 after chip power-up or hardware reset. When
KSZ8895MQ/RQ/FMQ is in normal operation mode, all PLL clocks are running, PHY and MAC are on, and the host
interface is ready for CPU read or write.
During normal operation mode, the host CPU can set the bit[4:3] in register 14 to change the current normal
operation mode to any one of the other three power management operation modes.
March 2012
KSZ8895MQ/RQ/FMQ
Internal PLL Clock
Function Blocks
Host Interface
Tx/Rx PHY
MAC
Normal Mode
Enabled
Enabled
Enabled
Enabled
Table 2. Internal Function Block Status
Rx unused block disabled
Power Saving Mode
Enabled
Enabled
Enabled
Power Management Operation Modes
29
Energy Detect Mode
Energy detect at Rx
Disabled
Disabled
Disabled
Soft Power Down Mode
KSZ8895MQ/RQ/FMQ
Disabled
Disabled
Disabled
Disabled
M9999-032612-1.5