KSZ8895MQ_12 MICREL [Micrel Semiconductor], KSZ8895MQ_12 Datasheet - Page 22

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KSZ8895MQ_12

Manufacturer Part Number
KSZ8895MQ_12
Description
Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
Micrel, Inc.
March 2012
Pin #
83
86
87
90
91
92
95
98
Pin Name
SMRXD0
SCONF1
SCONF0
LED5-2
LED5-1
LED5-0
LED4-0
LED3-0
PU/PD
IPD/O
IPU/O
IPU/O
IPU/O
IPU/O
IPU/O
IPD
IPD
(1)
Description
Switch MII receive bit 0.
Strap option: LED mode PD (default) = mode 0; PU = mode 1. See “Register
11.”
Pin 91,86,87 are dual MII/RMII configuration pins for the Port 5 MAC 5 MII/RMII
and PHY[5] MII/RMII. SW5-MII supports both MAC mode and PHY modes. P5-
MII supports PHY mode only. See pins configuration below.
Dual MII/RMII configuration pin. See pin 86 description.
LED5 indicator 2.
Strap option: Aging setup. See “Aging” section
PU (default) = aging enable;
PD = aging disable.
LED5 indicator 1.
Strap option:
PU (default): enable PHY[5] MII I/F.
PD: tristate all PHY[5] MII output. See “Pin 86 SCONF1.”
LED5 indicator 0.
Strap option for Port 4 only.
PU (default) = Enable auto-negotiation.
PD = Disable auto-negatiation. Strap to register76 bit[7].
LED3 indicator 0.
Strap option:
PU (default) = Select I/O current drive strength (8mA);
PD = Select I/O current drive strength (12mA).
Strap to register132 bit[7:6].
LED indicator 0.
Strap option:
PU (default) = Normal mode.
PD = Energy Detection mode (EDPD mode).
Strap to register 14 bits[4:3].
Pins [91, 86, 87]
LEDX_2
LEDX_1
LEDX_0
000
001
010
011
100
101
110
111
(1)
22
MAC Mode MII or RMII
MAC Mode MII or RMII
PHY Mode MII or RMII
PHY Mode MII or RMII
Port 5 MAC 5 Switch
PHY Mode SNI
PHY Mode SNI
Disable, Otri
Fulld/Col
SW5-MII
Mode 0
Lnk/Act
Disable
Speed
KSZ8895MQ/RQ/FMQ
MII/RMII P5-MII/RMII
Port 5 PHY [5]
P5- MII/RMII
P5- MII/RMII
P5- MII/RMII
Disable, Otri
Disable, Otri
Disable, Otri
Disable, Otri
100Lnk/Act
10Lnk/Act
Mode 1
Disable
M9999-032612-1.5
Fulld

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