s71jl064ha0bfw62 Advanced Micro Devices, s71jl064ha0bfw62 Datasheet - Page 60

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s71jl064ha0bfw62

Manufacturer Part Number
s71jl064ha0bfw62
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram Cmos 3.0volt-only, Simultaneous Operation Flash Memories And Static Ram/pseudo-static Ram
Manufacturer
Advanced Micro Devices
Datasheet
60
Autoselect Command Sequence
Enter SecSi™ Sector/Exit SecSi Sector Command Sequence
Byte/Word Program Command Sequence
If DQ5 goes high during a program or erase operation, writing the reset command
returns the banks to the read mode (or erase-suspend-read mode if that bank
was in Erase Suspend).
The autoselect command sequence allows the host system to access the manu-
facturer and device codes, and determine whether or not a sector is protected.
The autoselect command sequence may be written to an address within a bank
that is either in the read or erase-suspend-read mode. The autoselect command
may not be written while the device is actively programming or erasing in another
bank.
The autoselect command sequence is initiated by first writing two unlock cycles.
This is followed by a third write cycle that contains the bank address and the au-
toselect command. The bank then enters the autoselect mode. The system may
read any number of autoselect codes without reinitiating the command sequence.
Table 11
tion information, the system must write to the appropriate bank address (BA) and
sector address (SA).
ated with each sector.
The system must write the reset command to return to the read mode (or erase-
suspend-read mode if the bank was previously in Erase Suspend).
The SecSi Sector region provides a secured data area containing a random, six-
teen-byte electronic serial number (ESN). The system can access the SecSi
Sector region by issuing the three-cycle Enter SecSi Sector command sequence.
The device continues to access the SecSi Sector region until the system issues
the four-cycle Exit SecSi Sector command sequence. The Exit SecSi Sector com-
mand sequence returns the device to normal operation. The SecSi Sector is not
accessible when the device is executing an Embedded Program or embedded
Erase algorithm.
mand sequences. See also “SecSi™ (Secured Silicon) Sector Flash Memory
Region” for further information. Note that the ACC function and unlock bypass
modes are not available when the SecSi Sector is enabled.
The system may program the device by word or byte, depending on the state of
the BYTE# pin. Programming is a four-bus-cycle operation. The program com-
mand sequence is initiated by writing two unlock write cycles, followed by the
program set-up command. The program address and data are written next, which
in turn initiate the Embedded Program algorithm. The system is not required to
provide further controls or timings. The device automatically provides internally
generated program pulses and verifies the programmed cell margin.
shows the address and data requirements for the byte program command
sequence.
When the Embedded Program algorithm is complete, that bank then returns to
the read mode and addresses are no longer latched. The system can determine
the status of the program operation by using DQ7, DQ6, or RY/BY#. Refer to the
"Write Operation
Any commands written to the device during the Embedded Program Algorithm
are ignored. Note that a hardware reset immediately terminates the program
shows the address and data requirements. To determine sector protec-
Table 11
Status" section section for information on these status bits.
Table 3
shows the address and data requirements for both com-
shows the address range and bank number associ-
S29JL064H
P r e l i m i n a r y
Table 11
S71JLxxxHxx_00A1 February 25, 2004

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