s71jl064ha0bfw62 Advanced Micro Devices, s71jl064ha0bfw62 Datasheet - Page 3

• Manufacturer Part Number: s71jl064ha0bfw62
• Description: Stacked Multi-chip Product Mcp Flash Memory And Psram Cmos 3.0volt-only, Simultaneous Operation Flash Memories And Static Ram/pseudo-static Ram
• Manufacturer: Advanced Micro Devices

TABLE OF CONTENTS
Distinctive Characteristics . . . . . . . . . . . . . . . . . . . . 1
General Description . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . .2
Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 11
Ordering Information . . . . . . . . . . . . . . . . . . . . . . .29
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 33
General Description 38
Product Selector Guide . . . . . . . . . . . . . . . . . . . . .40
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .42
February 24, 2004 S71JLxxxHxx_00A0
S71JL128HC0/128HB0/064HB0/064HA0/064H80
MCP Block Diagram of S71JL064H80, Model Numbers 01/02 ................6
MCP Block Diagram of S71JL064H80, Model Numbers 10/11/12 ..............6
MCP Block Diagram of S71JL064HA0, Model Numbers 01/02 ................7
MCP Block Diagram of S71JL064HA0, Model Numbers 10/11/12/61 ........7
MCP Block Diagram of S71JL064HB0, Model Numbers 00/01/02 ..........8
MCP Block Diagram of S71JL128HB0, Model Numbers 00/01/02 ...........9
MCP Block Diagram of S71JL128HC0, Model Numbers 00/01/02 ........ 10
Connection Diagram of S71JL064H80, Model Numbers 01/02 .............. 11
Connection Diagram of S71JL064H80, Model Numbers 10/11/12 ........... 14
Connection Diagram of S71JL064HA0, Model Numbers 01/02 ............. 16
Connection Diagram of S71JL064HA0, Model Numbers 10/11/12/61 ..... 19
Connection Diagram of S71JL064HB0, Model Numbers 00/01/02 ....... 21
Connection Diagram of S71JL128HB0, Model Numbers 00/01/02 ........23
Connection Diagram of S71JL128HC0, Model Numbers 00/01/02 .......25
Look-ahead Connection Diagram ..................................................................27
FLB073 ....................................................................................................................33
FLJ073 ......................................................................................................................34
FTA073 ...................................................................................................................35
FTA088 ..................................................................................................................36
Simultaneous Read/Write Operations with Zero Latency ....................38
S71JLxxxHxx_00 Features ................................................................................38
Word/Byte Configuration ................................................................................ 43
Special Package Handling Instructions ...................................................... 12
Pin Description ................................................................................................ 12
Logic Symbol .....................................................................................................13
Pin Description .................................................................................................15
Logic Symbol .....................................................................................................15
Pin Description .................................................................................................17
Logic Symbol .................................................................................................... 18
Pin Description ............................................................................................... 20
Logic Symbol ................................................................................................... 20
Pin Description ............................................................................................... 22
Logic Symbol ................................................................................................... 22
Pin Description ............................................................................................... 24
Logic Symbol ................................................................................................... 24
Special Package Handling Instructions ......................................................25
Pin Description ............................................................................................... 26
Logic Symbol ................................................................................................... 26
Table 1. S71JLxxxHxx_00 Device Bus Operations .................. 42
S29JL064H
A d v a n c e
I n f o r m a t i o n
Common Flash Memory Interface (CFI) . . . . . . 56
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 59
Write Operation Status . . . . . . . . . . . . . . . . . . . . 66
Requirements for Reading Array Data ........................................................ 43
Writing Commands/Command Sequences ................................................ 43
Simultaneous Read/Write Operations with Zero Latency ...................44
Standby Mode ......................................................................................................44
Automatic Sleep Mode .....................................................................................44
RESET#: Hardware Reset Pin ......................................................................... 45
Output Disable Mode ....................................................................................... 45
Autoselect Mode ................................................................................................49
Sector/Sector Block Protection and Unprotection .................................50
Write Protect (WP#) ........................................................................................ 51
Temporary Sector Unprotect ........................................................................ 52
SecSi™ (Secured Silicon) Sector Flash Memory Region .......................... 53
Hardware Data Protection ............................................................................. 55
Reading Array Data ........................................................................................... 59
Reset Command ................................................................................................. 59
Autoselect Command Sequence ....................................................................60
Enter SecSi™ Sector/Exit SecSi Sector Command Sequence ................60
Byte/Word Program Command Sequence .................................................60
Chip Erase Command Sequence ................................................................... 62
Sector Erase Command Sequence ................................................................ 63
Erase Suspend/Erase Resume Commands ..................................................64
DQ7: Data# Polling ............................................................................................ 66
RY/BY#: Ready/Busy# .......................................................................................68
DQ6: Toggle Bit I ...............................................................................................69
DQ2: Toggle Bit II ..............................................................................................70
Reading Toggle Bits DQ6/DQ2 ...................................................................... 71
DQ5: Exceeded Timing Limits ......................................................................... 71
Accelerated Program Operation ...............................................................44
Autoselect Functions .....................................................................................44
Table 2. S29JL064H Sector Architecture ............................... 46
Table 3. Bank Address ........................................................ 49
Table 4. SecSi™ Sector Addresses ...................................... 49
Table 5. S71JLxxxHxx_00 Boot Sector/Sector Block Addresses for
Protection/Unprotection ...................................................... 50
Table 6. WP#/ACC Modes ................................................... 52
Figure 1. Temporary Sector Unprotect Operation ................... 52
Figure 2. In-System Sector Protect/Unprotect Algorithms ....... 53
Factory Locked: SecSi Sector Programmed and Protected At the
Factory ............................................................................................................... 54
Customer Lockable: SecSi Sector NOT Programmed or Protected At
the Factory ....................................................................................................... 54
Figure 3. SecSi Sector Protect Verify .................................... 55
Low VCC Write Inhibit ................................................................................ 55
Write Pulse “Glitch” Protection ............................................................... 55
Logical Inhibit ................................................................................................... 56
Power-Up Write Inhibit ............................................................................... 56
Table 7. CFI Query Identification String ................................ 56
Table 8. System Interface String ......................................... 57
Table 9. Device Geometry Definition .................................... 57
Table 10. Primary Vendor-Specific Extended Query ................ 58
Unlock Bypass Command Sequence ......................................................... 61
Figure 4. Program Operation ............................................... 62
Figure 5. Erase Operation ................................................... 64
Table 11. S29JL064H Command Definitions .......................... 65
Figure 6. Data# Polling Algorithm ........................................ 68
Figure 7. Toggle Bit Algorithm ............................................. 70
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