s71ws512ne0bfwzz Meet Spansion Inc., s71ws512ne0bfwzz Datasheet - Page 90

• Manufacturer Part Number: s71ws512ne0bfwzz
• Description: Stacked Multi-chip Product Mcp Flash Memoy And Psram Cmos 1.8 Volt, Simultaneous Operation, Burst Mode Flash Memory And Pseudo-static Ram
• Manufacturer: Meet Spansion Inc.

Notes:
1. The timings are similar to synchronous read timings.
2. VA = Valid Address. Two read cycles are required to determine status. When the Embedded Algorithm
3. RDY is active with data (DQ8 = 0 in the Configuration Register). When DQ8 = 1 in the Configuration Register,
Note:
to toggle DQ2 and DQ6
90
WE#
DQ6
DQ2
operation is complete, the toggle bits will stop toggling.
RDY is active one clock cycle before data.
CE#
CLK
AVD#
Addresses
OE#
Data
RDY
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE#
Embedded
Erasing
Enter
V A
Figure 26. Synchronous Data Polling Timings/Toggle Bit Timings
Erase
Suspend
Erase
S29WSxxxN MirrorBit™ Flash Family For Multi-chip Products (MCP) S71WS512NE0BFWZZ_00_ A1 June 28, 2004
Erase Suspend
t IACC
Read
Suspend Program
Figure 27. DQ2 vs. DQ6
A d v a n c e
Enter Erase
Status Data
Suspend
Program
Erase
I n f o r m a t i o n
V A
Erase Suspend
Read
Resume
Erase
t IACC
Erase
Status Data
Complete
Erase