zl50400 Zarlink Semiconductor, zl50400 Datasheet - Page 98

• Manufacturer Part Number: zl50400
• Description: Lightly Managed/unmanaged 9-port 10/100 M Ethernet Switch
• Manufacturer: Zarlink Semiconductor

12.3.8.5
CPU Address 711
Accessed by CPU (R/W)
12.3.9
12.3.9.1
I²C Address h04C+n; CPU Address:h800+n (n = port number)
Accessed by CPU and I²C (R/W)
12.3.9.2
I²C Address h05E+n, CPU Address:h820+n (n = port number)
Accessed by CPU and I²C (R/W)
This broadcast and multicast rate defines for Port n, the number of packets allowed to be forwarded within a
specified time. Once the packet rate is reached, packets will be dropped. To turn off the rate limit, program the field
to 0. Time base is based on register FCR0 [6:4]
Bits [3:0]:
(Group 8 Address) Per Port QOS Control
Bits [2:0]:
Bit [3]:
Bits [6:4]:
Bit [7]:
Bits [3:0]:
Bits [6:4]:
Bit [7]:
RMAC_MIRROR1 – RMAC Mirror 1
FCRn – Port 0~9 Flooding Control Register
BMRCn - Port 0~9 Broadcast/Multicast Rate Control
Multicast Rate Control. Number of multicast packets allowed within the time defined in
bits 6 to 4 of the Flooding Control Register (FCRn). (Default 0).
Source port to be mirrored
Mirror path
0: Receive
1: Transmit
Destination port for mirrored traffic
Mirror enable
U2MR: Unicast to Multicast Rate. Units in terms of time base defined in bits
[6:4]. This is used to limit the amount of flooding traffic from Port n. The value
in U2MR specifies how many packets are allowed to flood within the time
specified by bit [6:4]. To disable this function, program U2MR to 0.
(Default = 0)
Time Base for Unicast to Multicast, Multicast and Broadcast rate control of
Port n: (Default = 000)
000 = 100 us
001 = 200 us
010 = 400 us
011 = 800 us
100 = 1.6 ms
101 = 3.2 ms
110 = 6.4 ms
111 = 12.8 ms
Reserved
Zarlink Semiconductor Inc.
ZL50400
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Data Sheet